1 /* 2 * Copyright (C) 2010 Samsung Electronics 3 * Minkyu Kang <mk7.kang@samsung.com> 4 * 5 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board. 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef __CONFIG_H 27 #define __CONFIG_H 28 29 /* 30 * High Level Configuration Options 31 * (easy to change) 32 */ 33 #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ 34 #define CONFIG_S5P 1 /* which is in a S5P Family */ 35 #define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */ 36 #define CONFIG_UNIVERSAL 1 /* working with Universal */ 37 38 #include <asm/arch/cpu.h> /* get chip and board defs */ 39 40 #define CONFIG_ARCH_CPU_INIT 41 #define CONFIG_DISPLAY_CPUINFO 42 #define CONFIG_DISPLAY_BOARDINFO 43 44 /* Keep L2 Cache Disabled */ 45 #define CONFIG_SYS_L2CACHE_OFF 1 46 47 #define CONFIG_SYS_SDRAM_BASE 0x40000000 48 #define CONFIG_SYS_TEXT_BASE 0x44800000 49 50 /* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */ 51 #define CONFIG_SYS_CLK_FREQ_C210 24000000 52 #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210 53 54 #define CONFIG_SETUP_MEMORY_TAGS 55 #define CONFIG_CMDLINE_TAG 56 #define CONFIG_INITRD_TAG 57 #define CONFIG_REVISION_TAG 58 #define CONFIG_CMDLINE_EDITING 59 60 /* Size of malloc() pool */ 61 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20)) 62 63 /* select serial console configuration */ 64 #define CONFIG_SERIAL_MULTI 1 65 #define CONFIG_SERIAL2 1 /* use SERIAL 2 */ 66 #define CONFIG_BAUDRATE 115200 67 68 /* MMC */ 69 #define CONFIG_GENERIC_MMC 70 #define CONFIG_MMC 71 #define CONFIG_SDHCI 72 #define CONFIG_S5P_SDHCI 73 74 /* PWM */ 75 #define CONFIG_PWM 1 76 77 /* It should define before config_cmd_default.h */ 78 #define CONFIG_SYS_NO_FLASH 1 79 80 /* Command definition */ 81 #include <config_cmd_default.h> 82 83 #undef CONFIG_CMD_FPGA 84 #undef CONFIG_CMD_MISC 85 #undef CONFIG_CMD_NET 86 #undef CONFIG_CMD_NFS 87 #undef CONFIG_CMD_XIMG 88 #define CONFIG_CMD_CACHE 89 #define CONFIG_CMD_ONENAND 90 #define CONFIG_CMD_MTDPARTS 91 #define CONFIG_CMD_MMC 92 #define CONFIG_CMD_FAT 93 94 #define CONFIG_BOOTDELAY 1 95 #define CONFIG_ZERO_BOOTDELAY_CHECK 96 97 #define CONFIG_MTD_DEVICE 98 #define CONFIG_MTD_PARTITIONS 99 100 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */ 101 #define MTDIDS_DEFAULT "onenand0=samsung-onenand" 102 103 #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\ 104 "128k(s-boot)"\ 105 ",896k(bootloader)"\ 106 ",256k(params)"\ 107 ",2816k(config)"\ 108 ",8m(csa)"\ 109 ",7m(kernel)"\ 110 ",1m(log)"\ 111 ",12m(modem)"\ 112 ",60m(qboot)"\ 113 ",-(UBI)\0" 114 115 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT 116 117 #define MBRPARTS_DEFAULT "20M(permanent)"\ 118 ",20M(boot)"\ 119 ",1G(system)"\ 120 ",100M(swap)"\ 121 ",-(UMS)\0" 122 123 #define CONFIG_BOOTARGS "Please use defined boot" 124 #define CONFIG_BOOTCOMMAND "run mmcboot" 125 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" 126 127 #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7" 128 #define CONFIG_BOOTBLOCK "10" 129 #define CONFIG_UBIBLOCK "9" 130 131 #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc " 132 #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \ 133 "${mtdparts}" 134 135 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}" 136 137 #define CONFIG_ENV_OVERWRITE 138 #define CONFIG_SYS_CONSOLE_INFO_QUIET 139 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 140 141 #define CONFIG_EXTRA_ENV_SETTINGS \ 142 "updateb=" \ 143 "onenand erase 0x0 0x100000;" \ 144 "onenand write 0x42008000 0x0 0x100000\0" \ 145 "updatek=" \ 146 "onenand erase 0xc00000 0x500000;" \ 147 "onenand write 0x41008000 0xc00000 0x500000\0" \ 148 "bootk=" \ 149 "run loaduimage; bootm 0x40007FC0\0" \ 150 "updatemmc=" \ 151 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \ 152 "mmc boot 0 1 1 0\0" \ 153 "updatebackup=" \ 154 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \ 155 "mmc boot 0 1 1 0\0" \ 156 "updatebootb=" \ 157 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \ 158 "lpj=lpj=3981312\0" \ 159 "ubifsboot=" \ 160 "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \ 161 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 162 CONFIG_ENV_COMMON_BOOT "; run bootk\0" \ 163 "tftpboot=" \ 164 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \ 165 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \ 166 CONFIG_ENV_COMMON_BOOT \ 167 "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \ 168 "nfsboot=" \ 169 "set bootargs root=/dev/nfs rw " \ 170 "nfsroot=${nfsroot},nolock,tcp " \ 171 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 172 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \ 173 "; run bootk\0" \ 174 "ramfsboot=" \ 175 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \ 176 "${console} ${meminfo} " \ 177 "initrd=0x43000000,8M ramdisk=8192\0" \ 178 "mmcboot=" \ 179 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \ 180 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \ 181 "run loaduimage; bootm 0x40007FC0\0" \ 182 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \ 183 "boottrace=setenv opts initcall_debug; run bootcmd\0" \ 184 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \ 185 "verify=n\0" \ 186 "rootfstype=ext4\0" \ 187 "console=" CONFIG_DEFAULT_CONSOLE \ 188 "mtdparts=" MTDPARTS_DEFAULT \ 189 "mbrparts=" MBRPARTS_DEFAULT \ 190 "meminfo=crashkernel=32M@0x50000000\0" \ 191 "nfsroot=/nfsroot/arm\0" \ 192 "bootblock=" CONFIG_BOOTBLOCK "\0" \ 193 "ubiblock=" CONFIG_UBIBLOCK" \0" \ 194 "ubi=enabled\0" \ 195 "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \ 196 "mmcdev=0\0" \ 197 "mmcbootpart=2\0" \ 198 "mmcrootpart=3\0" \ 199 "opts=always_resume=1" 200 201 /* Miscellaneous configurable options */ 202 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 203 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 204 #define CONFIG_SYS_PROMPT "Universal # " 205 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 206 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */ 207 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 208 /* Boot Argument Buffer Size */ 209 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 210 /* memtest works on */ 211 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 212 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000) 213 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000) 214 215 #define CONFIG_SYS_HZ 1000 216 217 /* Universal has 2 banks of DRAM */ 218 #define CONFIG_NR_DRAM_BANKS 2 219 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */ 220 #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */ 221 #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */ 222 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */ 223 224 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */ 225 226 #define CONFIG_SYS_MONITOR_BASE 0x00000000 227 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ 228 229 #define CONFIG_USE_ONENAND_BOARD_INIT 230 #define CONFIG_SAMSUNG_ONENAND 231 #define CONFIG_SYS_ONENAND_BASE 0x0C000000 232 233 #define CONFIG_ENV_IS_IN_MMC 1 234 #define CONFIG_SYS_MMC_ENV_DEV 0 235 #define CONFIG_ENV_SIZE 4096 236 #define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */ 237 238 #define CONFIG_DOS_PARTITION 1 239 240 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE) 241 242 #define CONFIG_SYS_CACHELINE_SIZE 32 243 244 #include <asm/arch/gpio.h> 245 /* 246 * I2C Settings 247 */ 248 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7) 249 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6) 250 251 #define CONFIG_SOFT_I2C 252 #define CONFIG_SOFT_I2C_READ_REPEATED_START 253 #define CONFIG_SYS_I2C_SPEED 50000 254 #define CONFIG_I2C_MULTI_BUS 255 #define CONFIG_SYS_MAX_I2C_BUS 7 256 257 #define CONFIG_PMIC 258 #define CONFIG_PMIC_I2C 259 #define CONFIG_PMIC_MAX8998 260 261 #define CONFIG_USB_GADGET 262 #define CONFIG_USB_GADGET_S3C_UDC_OTG 263 #define CONFIG_USB_GADGET_DUALSPEED 264 265 #endif /* __CONFIG_H */ 266