1 /* 2 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 * 6 * Configuration settings for the Freescale S32V234 EVB board. 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #ifndef CONFIG_SPL_BUILD 13 #include <config_distro_defaults.h> 14 #endif 15 16 #include <asm/arch/imx-regs.h> 17 18 #define CONFIG_S32V234 19 #define CONFIG_DM 20 21 /* Config GIC */ 22 #define CONFIG_GICV2 23 #define GICD_BASE 0x7D001000 24 #define GICC_BASE 0x7D002000 25 26 #define CONFIG_REMAKE_ELF 27 #undef CONFIG_RUN_FROM_IRAM_ONLY 28 29 #define CONFIG_RUN_FROM_DDR1 30 #undef CONFIG_RUN_FROM_DDR0 31 32 /* Run by default from DDR1 */ 33 #ifdef CONFIG_RUN_FROM_DDR0 34 #define DDR_BASE_ADDR 0x80000000 35 #else 36 #define DDR_BASE_ADDR 0xC0000000 37 #endif 38 39 #define CONFIG_MACH_TYPE 4146 40 41 #define CONFIG_SKIP_LOWLEVEL_INIT 42 43 /* Config CACHE */ 44 #define CONFIG_CMD_CACHE 45 46 #define CONFIG_SYS_FULL_VA 47 48 /* Enable passing of ATAGs */ 49 #define CONFIG_CMDLINE_TAG 50 51 /* SMP Spin Table Definitions */ 52 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 53 54 /* Generic Timer Definitions */ 55 #define COUNTER_FREQUENCY (1000000000) /* 1000MHz */ 56 #define CONFIG_SYS_FSL_ERRATUM_A008585 57 58 /* Size of malloc() pool */ 59 #ifdef CONFIG_RUN_FROM_IRAM_ONLY 60 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024) 61 #else 62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 63 #endif 64 #define CONFIG_BOARD_EARLY_INIT_F 65 66 #define CONFIG_DM_SERIAL 67 #define CONFIG_FSL_LINFLEXUART 68 #define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR 69 70 #define CONFIG_DEBUG_UART_LINFLEXUART 71 #define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE 72 73 /* Allow to overwrite serial and ethaddr */ 74 #define CONFIG_ENV_OVERWRITE 75 #define CONFIG_SYS_UART_PORT (1) 76 #define CONFIG_BAUDRATE 115200 77 78 #undef CONFIG_CMD_IMLS 79 80 #define CONFIG_FSL_ESDHC 81 #define CONFIG_FSL_USDHC 82 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR 83 #define CONFIG_SYS_FSL_ESDHC_NUM 1 84 85 #define CONFIG_CMD_MMC 86 #define CONFIG_GENERIC_MMC 87 /* #define CONFIG_CMD_EXT2 EXT2 Support */ 88 #define CONFIG_DOS_PARTITION 89 90 #if 0 91 92 /* Ethernet config */ 93 #define CONFIG_CMD_PING 94 #define CONFIG_CMD_MII 95 #define CONFIG_FEC_MXC 96 #define CONFIG_MII 97 #define IMX_FEC_BASE ENET_BASE_ADDR 98 #define CONFIG_FEC_XCV_TYPE RMII 99 #define CONFIG_FEC_MXC_PHYADDR 0 100 #define CONFIG_PHYLIB 101 #define CONFIG_PHY_MICREL 102 #endif 103 104 #if 0 /* Disable until the I2C driver will be updated */ 105 106 /* I2C Configs */ 107 #define CONFIG_CMD_I2C 108 #define CONFIG_HARD_I2C 109 #define CONFIG_I2C_MXC 110 #define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR 111 #define CONFIG_SYS_I2C_SPEED 100000 112 #endif 113 114 #if 0 /* Disable until the FLASH will be implemented */ 115 #define CONFIG_SYS_USE_NAND 116 #endif 117 118 #ifdef CONFIG_SYS_USE_NAND 119 /* Nand Flash Configs */ 120 #define CONFIG_CMD_NAND 121 #define CONFIG_JFFS2_NAND 122 #define MTD_NAND_FSL_NFC_SWECC 1 123 #define CONFIG_NAND_FSL_NFC 124 #define CONFIG_SYS_NAND_BASE 0x400E0000 125 #define CONFIG_SYS_MAX_NAND_DEVICE 1 126 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE 127 #define CONFIG_SYS_NAND_SELECT_DEVICE 128 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ 129 #endif 130 131 #define CONFIG_LOADADDR 0xC307FFC0 132 #define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw" 133 134 #define CONFIG_CMD_ENV 135 #define CONFIG_EXTRA_ENV_SETTINGS \ 136 "boot_scripts=boot.scr.uimg boot.scr\0" \ 137 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 138 "console=ttyLF0,115200\0" \ 139 "fdt_file=s32v234-evb.dtb\0" \ 140 "fdt_high=0xffffffff\0" \ 141 "initrd_high=0xffffffff\0" \ 142 "fdt_addr_r=0xC2000000\0" \ 143 "kernel_addr_r=0xC307FFC0\0" \ 144 "ramdisk_addr_r=0xC4000000\0" \ 145 "ramdisk=rootfs.uimg\0"\ 146 "ip_dyn=yes\0" \ 147 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 148 "update_sd_firmware_filename=u-boot.imx\0" \ 149 "update_sd_firmware=" \ 150 "if test ${ip_dyn} = yes; then " \ 151 "setenv get_cmd dhcp; " \ 152 "else " \ 153 "setenv get_cmd tftp; " \ 154 "fi; " \ 155 "if mmc dev ${mmcdev}; then " \ 156 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 157 "setexpr fw_sz ${filesize} / 0x200; " \ 158 "setexpr fw_sz ${fw_sz} + 1; " \ 159 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 160 "fi; " \ 161 "fi\0" \ 162 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \ 163 "jtagboot=echo Booting using jtag...; " \ 164 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ 165 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \ 166 "run loaduimage; run loadramdisk; run loadfdt;"\ 167 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ 168 "boot_net_usb_start=true\0" \ 169 BOOTENV 170 171 #define BOOT_TARGET_DEVICES(func) \ 172 func(MMC, mmc, 1) \ 173 func(MMC, mmc, 0) \ 174 func(DHCP, dhcp, na) 175 176 #define CONFIG_BOOTCOMMAND \ 177 "run distro_bootcmd" 178 179 #include <config_distro_bootcmd.h> 180 181 /* Miscellaneous configurable options */ 182 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 183 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 184 #define CONFIG_SYS_PROMPT "=> " 185 #undef CONFIG_AUTO_COMPLETE 186 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 187 #define CONFIG_SYS_PBSIZE \ 188 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 189 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 190 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 191 #define CONFIG_CMDLINE_EDITING 192 193 #define CONFIG_CMD_MEMTEST 194 #define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR) 195 #define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000) 196 197 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 198 #define CONFIG_SYS_HZ 1000 199 200 #define CONFIG_SYS_TEXT_BASE 0x3E800000 /* SDRAM */ 201 202 #ifdef CONFIG_RUN_FROM_IRAM_ONLY 203 #define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR) 204 #endif 205 206 /* 207 * Stack sizes 208 * The stack sizes are set up in start.S using the settings below 209 */ 210 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 211 212 #if 0 213 /* Configure PXE */ 214 #define CONFIG_BOOTP_PXE 215 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 216 #endif 217 218 /* Physical memory map */ 219 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */ 220 #define CONFIG_NR_DRAM_BANKS 1 221 #define PHYS_SDRAM (DDR_BASE_ADDR) 222 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) 223 224 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 225 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 226 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 227 228 #define CONFIG_SYS_INIT_SP_OFFSET \ 229 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 230 #define CONFIG_SYS_INIT_SP_ADDR \ 231 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 232 233 /* FLASH and environment organization */ 234 #define CONFIG_SYS_NO_FLASH 235 236 #define CONFIG_ENV_SIZE (8 * 1024) 237 #define CONFIG_ENV_IS_IN_MMC 238 239 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 240 #define CONFIG_SYS_MMC_ENV_DEV 0 241 242 243 #define CONFIG_BOOTP_BOOTFILESIZE 244 #define CONFIG_BOOTP_BOOTPATH 245 #define CONFIG_BOOTP_GATEWAY 246 #define CONFIG_BOOTP_HOSTNAME 247 248 #endif 249