1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2015-2016 Freescale Semiconductor, Inc. 4 * 5 * Configuration settings for the Freescale S32V234 EVB board. 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include <asm/arch/imx-regs.h> 12 13 #define CONFIG_S32V234 14 15 /* Config GIC */ 16 #define CONFIG_GICV2 17 #define GICD_BASE 0x7D001000 18 #define GICC_BASE 0x7D002000 19 20 #define CONFIG_REMAKE_ELF 21 #undef CONFIG_RUN_FROM_IRAM_ONLY 22 23 #define CONFIG_RUN_FROM_DDR1 24 #undef CONFIG_RUN_FROM_DDR0 25 26 /* Run by default from DDR1 */ 27 #ifdef CONFIG_RUN_FROM_DDR0 28 #define DDR_BASE_ADDR 0x80000000 29 #else 30 #define DDR_BASE_ADDR 0xC0000000 31 #endif 32 33 #define CONFIG_MACH_TYPE 4146 34 35 #define CONFIG_SKIP_LOWLEVEL_INIT 36 37 /* Config CACHE */ 38 #define CONFIG_CMD_CACHE 39 40 #define CONFIG_SYS_FULL_VA 41 42 /* Enable passing of ATAGs */ 43 #define CONFIG_CMDLINE_TAG 44 45 /* SMP Spin Table Definitions */ 46 #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) 47 48 /* Generic Timer Definitions */ 49 #define COUNTER_FREQUENCY (1000000000) /* 1000MHz */ 50 #define CONFIG_SYS_FSL_ERRATUM_A008585 51 52 /* Size of malloc() pool */ 53 #ifdef CONFIG_RUN_FROM_IRAM_ONLY 54 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024) 55 #else 56 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 57 #endif 58 59 #define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR 60 61 #define CONFIG_DEBUG_UART_LINFLEXUART 62 #define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE 63 64 /* Allow to overwrite serial and ethaddr */ 65 #define CONFIG_ENV_OVERWRITE 66 #define CONFIG_SYS_UART_PORT (1) 67 68 #define CONFIG_FSL_USDHC 69 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR 70 #define CONFIG_SYS_FSL_ESDHC_NUM 1 71 72 #define CONFIG_CMD_MMC 73 /* #define CONFIG_CMD_EXT2 EXT2 Support */ 74 75 #if 0 76 77 /* Ethernet config */ 78 #define CONFIG_CMD_MII 79 #define CONFIG_FEC_MXC 80 #define CONFIG_MII 81 #define IMX_FEC_BASE ENET_BASE_ADDR 82 #define CONFIG_FEC_XCV_TYPE RMII 83 #define CONFIG_FEC_MXC_PHYADDR 0 84 #endif 85 86 #if 0 /* Disable until the FLASH will be implemented */ 87 #define CONFIG_SYS_USE_NAND 88 #endif 89 90 #ifdef CONFIG_SYS_USE_NAND 91 /* Nand Flash Configs */ 92 #define CONFIG_JFFS2_NAND 93 #define MTD_NAND_FSL_NFC_SWECC 1 94 #define CONFIG_NAND_FSL_NFC 95 #define CONFIG_SYS_NAND_BASE 0x400E0000 96 #define CONFIG_SYS_MAX_NAND_DEVICE 1 97 #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE 98 #define CONFIG_SYS_NAND_SELECT_DEVICE 99 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ 100 #endif 101 102 #define CONFIG_LOADADDR 0xC307FFC0 103 104 #define CONFIG_EXTRA_ENV_SETTINGS \ 105 "boot_scripts=boot.scr.uimg boot.scr\0" \ 106 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 107 "console=ttyLF0,115200\0" \ 108 "fdt_file=s32v234-evb.dtb\0" \ 109 "fdt_high=0xffffffff\0" \ 110 "initrd_high=0xffffffff\0" \ 111 "fdt_addr_r=0xC2000000\0" \ 112 "kernel_addr_r=0xC307FFC0\0" \ 113 "ramdisk_addr_r=0xC4000000\0" \ 114 "ramdisk=rootfs.uimg\0"\ 115 "ip_dyn=yes\0" \ 116 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 117 "update_sd_firmware_filename=u-boot.imx\0" \ 118 "update_sd_firmware=" \ 119 "if test ${ip_dyn} = yes; then " \ 120 "setenv get_cmd dhcp; " \ 121 "else " \ 122 "setenv get_cmd tftp; " \ 123 "fi; " \ 124 "if mmc dev ${mmcdev}; then " \ 125 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 126 "setexpr fw_sz ${filesize} / 0x200; " \ 127 "setexpr fw_sz ${fw_sz} + 1; " \ 128 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 129 "fi; " \ 130 "fi\0" \ 131 "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \ 132 "jtagboot=echo Booting using jtag...; " \ 133 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ 134 "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \ 135 "run loaduimage; run loadramdisk; run loadfdt;"\ 136 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ 137 "boot_net_usb_start=true\0" \ 138 BOOTENV 139 140 #define BOOT_TARGET_DEVICES(func) \ 141 func(MMC, mmc, 1) \ 142 func(MMC, mmc, 0) \ 143 func(DHCP, dhcp, na) 144 145 #define CONFIG_BOOTCOMMAND \ 146 "run distro_bootcmd" 147 148 #include <config_distro_bootcmd.h> 149 150 /* Miscellaneous configurable options */ 151 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 152 #define CONFIG_SYS_PROMPT "=> " 153 154 #define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR) 155 #define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000) 156 157 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 158 #define CONFIG_SYS_HZ 1000 159 160 #ifdef CONFIG_RUN_FROM_IRAM_ONLY 161 #define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR) 162 #endif 163 164 #if 0 165 /* Configure PXE */ 166 #define CONFIG_BOOTP_PXE_CLIENTARCH 0x100 167 #endif 168 169 /* Physical memory map */ 170 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */ 171 #define CONFIG_NR_DRAM_BANKS 1 172 #define PHYS_SDRAM (DDR_BASE_ADDR) 173 #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) 174 175 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 176 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 177 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 178 179 #define CONFIG_SYS_INIT_SP_OFFSET \ 180 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 181 #define CONFIG_SYS_INIT_SP_ADDR \ 182 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 183 184 /* environment organization */ 185 #define CONFIG_ENV_SIZE (8 * 1024) 186 187 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 188 #define CONFIG_SYS_MMC_ENV_DEV 0 189 190 191 #define CONFIG_BOOTP_BOOTFILESIZE 192 193 #endif 194