xref: /openbmc/u-boot/include/configs/s32v234evb.h (revision 11bd5e7b62070c7ca0188230edc4c5e7fdfe1349)
1 /*
2  * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  *
6  * Configuration settings for the Freescale S32V234 EVB board.
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #ifndef CONFIG_SPL_BUILD
13 #include <config_distro_defaults.h>
14 #endif
15 
16 #include <asm/arch/imx-regs.h>
17 
18 #define CONFIG_S32V234
19 #define CONFIG_DM
20 
21 /* Config GIC */
22 #define CONFIG_GICV2
23 #define GICD_BASE 0x7D001000
24 #define GICC_BASE 0x7D002000
25 
26 #define CONFIG_REMAKE_ELF
27 #undef CONFIG_RUN_FROM_IRAM_ONLY
28 
29 #define CONFIG_RUN_FROM_DDR1
30 #undef CONFIG_RUN_FROM_DDR0
31 
32 /* Run by default from DDR1  */
33 #ifdef CONFIG_RUN_FROM_DDR0
34 #define DDR_BASE_ADDR		0x80000000
35 #else
36 #define DDR_BASE_ADDR		0xC0000000
37 #endif
38 
39 #define CONFIG_MACH_TYPE		4146
40 
41 #define CONFIG_SKIP_LOWLEVEL_INIT
42 
43 /* Config CACHE */
44 #define CONFIG_CMD_CACHE
45 
46 #define CONFIG_SYS_FULL_VA
47 
48 /* Enable passing of ATAGs */
49 #define CONFIG_CMDLINE_TAG
50 
51 /* SMP Spin Table Definitions */
52 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
53 
54 /* Generic Timer Definitions */
55 #define COUNTER_FREQUENCY               (1000000000)	/* 1000MHz */
56 #define CONFIG_SYS_FSL_ERRATUM_A008585
57 
58 /* Size of malloc() pool */
59 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
60 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1 * 1024 * 1024)
61 #else
62 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
63 #endif
64 
65 #define CONFIG_DM_SERIAL
66 #define CONFIG_FSL_LINFLEXUART
67 #define LINFLEXUART_BASE		LINFLEXD0_BASE_ADDR
68 
69 #define CONFIG_DEBUG_UART_LINFLEXUART
70 #define CONFIG_DEBUG_UART_BASE		LINFLEXUART_BASE
71 
72 /* Allow to overwrite serial and ethaddr */
73 #define CONFIG_ENV_OVERWRITE
74 #define CONFIG_SYS_UART_PORT		(1)
75 #define CONFIG_BAUDRATE				115200
76 
77 #undef CONFIG_CMD_IMLS
78 
79 #define CONFIG_FSL_ESDHC
80 #define CONFIG_FSL_USDHC
81 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC_BASE_ADDR
82 #define CONFIG_SYS_FSL_ESDHC_NUM	1
83 
84 #define CONFIG_CMD_MMC
85 #define CONFIG_GENERIC_MMC
86 /* #define CONFIG_CMD_EXT2 EXT2 Support */
87 #define CONFIG_DOS_PARTITION
88 
89 #if 0
90 
91 /* Ethernet config */
92 #define CONFIG_CMD_PING
93 #define CONFIG_CMD_MII
94 #define CONFIG_FEC_MXC
95 #define CONFIG_MII
96 #define IMX_FEC_BASE            ENET_BASE_ADDR
97 #define CONFIG_FEC_XCV_TYPE     RMII
98 #define CONFIG_FEC_MXC_PHYADDR  0
99 #define CONFIG_PHYLIB
100 #define CONFIG_PHY_MICREL
101 #endif
102 
103 #if 0				/* Disable until the I2C driver will be updated */
104 
105 /* I2C Configs */
106 #define CONFIG_CMD_I2C
107 #define CONFIG_HARD_I2C
108 #define CONFIG_I2C_MXC
109 #define CONFIG_SYS_I2C_BASE		I2C0_BASE_ADDR
110 #define CONFIG_SYS_I2C_SPEED		100000
111 #endif
112 
113 #if 0				/* Disable until the FLASH will be implemented */
114 #define CONFIG_SYS_USE_NAND
115 #endif
116 
117 #ifdef CONFIG_SYS_USE_NAND
118 /* Nand Flash Configs */
119 #define	CONFIG_CMD_NAND
120 #define CONFIG_JFFS2_NAND
121 #define MTD_NAND_FSL_NFC_SWECC 1
122 #define CONFIG_NAND_FSL_NFC
123 #define CONFIG_SYS_NAND_BASE		0x400E0000
124 #define CONFIG_SYS_MAX_NAND_DEVICE	1
125 #define NAND_MAX_CHIPS			CONFIG_SYS_MAX_NAND_DEVICE
126 #define CONFIG_SYS_NAND_SELECT_DEVICE
127 #define CONFIG_SYS_64BIT_VSPRINTF	/* needed for nand_util.c */
128 #endif
129 
130 #define CONFIG_LOADADDR			0xC307FFC0
131 #define CONFIG_BOOTARGS			"console=ttyLF0 root=/dev/ram rw"
132 
133 #define CONFIG_CMD_ENV
134 #define CONFIG_EXTRA_ENV_SETTINGS \
135 	"boot_scripts=boot.scr.uimg boot.scr\0" \
136 	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
137 	"console=ttyLF0,115200\0" \
138 	"fdt_file=s32v234-evb.dtb\0" \
139 	"fdt_high=0xffffffff\0" \
140 	"initrd_high=0xffffffff\0" \
141 	"fdt_addr_r=0xC2000000\0" \
142 	"kernel_addr_r=0xC307FFC0\0" \
143 	"ramdisk_addr_r=0xC4000000\0" \
144 	"ramdisk=rootfs.uimg\0"\
145 	"ip_dyn=yes\0" \
146 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
147 	"update_sd_firmware_filename=u-boot.imx\0" \
148 	"update_sd_firmware=" \
149 		"if test ${ip_dyn} = yes; then " \
150 			"setenv get_cmd dhcp; " \
151 		"else " \
152 			"setenv get_cmd tftp; " \
153 		"fi; " \
154 		"if mmc dev ${mmcdev}; then "	\
155 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
156 				"setexpr fw_sz ${filesize} / 0x200; " \
157 				"setexpr fw_sz ${fw_sz} + 1; "	\
158 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
159 			"fi; "	\
160 		"fi\0" \
161 	"loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
162 	"jtagboot=echo Booting using jtag...; " \
163 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
164 	"jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
165 		"run loaduimage; run loadramdisk; run loadfdt;"\
166 		"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
167 	"boot_net_usb_start=true\0" \
168 	BOOTENV
169 
170 #define BOOT_TARGET_DEVICES(func) \
171 	func(MMC, mmc, 1) \
172 	func(MMC, mmc, 0) \
173 	func(DHCP, dhcp, na)
174 
175 #define CONFIG_BOOTCOMMAND \
176 	"run distro_bootcmd"
177 
178 #include <config_distro_bootcmd.h>
179 
180 /* Miscellaneous configurable options */
181 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
182 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
183 #define CONFIG_SYS_PROMPT		"=> "
184 #undef CONFIG_AUTO_COMPLETE
185 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
186 #define CONFIG_SYS_PBSIZE		\
187 			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
188 #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
189 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
190 #define CONFIG_CMDLINE_EDITING
191 
192 #define CONFIG_CMD_MEMTEST
193 #define CONFIG_SYS_MEMTEST_START	(DDR_BASE_ADDR)
194 #define CONFIG_SYS_MEMTEST_END		(DDR_BASE_ADDR + 0x7C00000)
195 
196 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
197 #define CONFIG_SYS_HZ				1000
198 
199 #define CONFIG_SYS_TEXT_BASE		0x3E800000	/* SDRAM */
200 
201 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
202 #define CONFIG_SYS_MALLOC_BASE		(DDR_BASE_ADDR)
203 #endif
204 
205 /*
206  * Stack sizes
207  * The stack sizes are set up in start.S using the settings below
208  */
209 #define CONFIG_STACKSIZE		(128 * 1024)	/* regular stack */
210 
211 #if 0
212 /* Configure PXE */
213 #define CONFIG_BOOTP_PXE
214 #define CONFIG_BOOTP_PXE_CLIENTARCH	0x100
215 #endif
216 
217 /* Physical memory map */
218 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
219 #define CONFIG_NR_DRAM_BANKS		1
220 #define PHYS_SDRAM			(DDR_BASE_ADDR)
221 #define PHYS_SDRAM_SIZE			(256 * 1024 * 1024)
222 
223 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
224 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
225 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
226 
227 #define CONFIG_SYS_INIT_SP_OFFSET \
228 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
229 #define CONFIG_SYS_INIT_SP_ADDR \
230 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
231 
232 /* FLASH and environment organization */
233 #define CONFIG_SYS_NO_FLASH
234 
235 #define CONFIG_ENV_SIZE			(8 * 1024)
236 #define CONFIG_ENV_IS_IN_MMC
237 
238 #define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
239 #define CONFIG_SYS_MMC_ENV_DEV		0
240 
241 
242 #define CONFIG_BOOTP_BOOTFILESIZE
243 #define CONFIG_BOOTP_BOOTPATH
244 #define CONFIG_BOOTP_GATEWAY
245 #define CONFIG_BOOTP_HOSTNAME
246 
247 #endif
248