1 /* 2 * Configuation settings for the Renesas RSK2+SH7269 board 3 * 4 * Copyright (C) 2012 Renesas Electronics Europe Ltd. 5 * Copyright (C) 2012 Phil Edworthy 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __RSK7269_H 11 #define __RSK7269_H 12 13 #undef DEBUG 14 #define CONFIG_CPU_SH7269 1 15 #define CONFIG_RSK7269 1 16 17 #ifndef _CONFIG_CMD_DEFAULT_H 18 # include <config_cmd_default.h> 19 #endif 20 21 #define CONFIG_BAUDRATE 115200 22 #define CONFIG_BOOTARGS "console=ttySC7,115200" 23 #define CONFIG_BOOTDELAY 3 24 #define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 25 26 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 27 #define CONFIG_SYS_CBSIZE 256 /* Boot Argument Buffer Size */ 28 #define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */ 29 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 30 31 /* Serial */ 32 #define CONFIG_SCIF_CONSOLE 33 #define CONFIG_CONS_SCIF7 34 35 /* Memory */ 36 /* u-boot relocated to top 256KB of ram */ 37 #define CONFIG_SYS_TEXT_BASE 0x0DFC0000 38 #define CONFIG_SYS_SDRAM_BASE 0x0C000000 39 #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 40 41 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 42 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 43 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 44 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 45 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) 46 47 /* NOR Flash */ 48 #define CONFIG_FLASH_CFI_DRIVER 49 #define CONFIG_SYS_FLASH_CFI 50 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 51 #define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ 52 #define CONFIG_SYS_MAX_FLASH_BANKS 1 53 #define CONFIG_SYS_MAX_FLASH_SECT 512 54 55 #define CONFIG_ENV_IS_IN_FLASH 1 56 #define CONFIG_ENV_OFFSET (128 * 1024) 57 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 58 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 59 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 60 61 /* Board Clock */ 62 #define CONFIG_SYS_CLK_FREQ 66125000 63 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 64 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 65 #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 66 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 67 68 /* Network interface */ 69 #define CONFIG_SMC911X 70 #define CONFIG_SMC911X_16_BIT 71 #define CONFIG_SMC911X_BASE 0x24000000 72 73 #endif /* __RSK7269_H */ 74