xref: /openbmc/u-boot/include/configs/rsk7264.h (revision 117029c5)
17fbeb642SPhil Edworthy /*
2efa4e1b9SPhil Edworthy  * Configuation settings for the Renesas RSK2+SH7264 board
37fbeb642SPhil Edworthy  *
47fbeb642SPhil Edworthy  * Copyright (C) 2011 Renesas Electronics Europe Ltd.
57fbeb642SPhil Edworthy  * Copyright (C) 2008 Nobuhiro Iwamatsu
67fbeb642SPhil Edworthy  * Copyright (C) 2008 Renesas Solutions Corp.
77fbeb642SPhil Edworthy  *
87fbeb642SPhil Edworthy  * This file is released under the terms of GPL v2 and any later version.
97fbeb642SPhil Edworthy  * See the file COPYING in the root directory of the source tree for details.
107fbeb642SPhil Edworthy  */
117fbeb642SPhil Edworthy 
127fbeb642SPhil Edworthy #ifndef __RSK7264_H
137fbeb642SPhil Edworthy #define __RSK7264_H
147fbeb642SPhil Edworthy 
157fbeb642SPhil Edworthy #undef DEBUG
167fbeb642SPhil Edworthy #define CONFIG_SH		1
177fbeb642SPhil Edworthy #define CONFIG_SH2		1
187fbeb642SPhil Edworthy #define CONFIG_SH2A		1
197fbeb642SPhil Edworthy #define CONFIG_CPU_SH7264	1
207fbeb642SPhil Edworthy #define CONFIG_RSK7264		1
217fbeb642SPhil Edworthy 
22efa4e1b9SPhil Edworthy #ifndef _CONFIG_CMD_DEFAULT_H
23efa4e1b9SPhil Edworthy # include <config_cmd_default.h>
24efa4e1b9SPhil Edworthy #endif
257fbeb642SPhil Edworthy 
267fbeb642SPhil Edworthy #define CONFIG_BAUDRATE		115200
277fbeb642SPhil Edworthy #define CONFIG_BOOTARGS		"console=ttySC3,115200"
287fbeb642SPhil Edworthy #define CONFIG_BOOTDELAY	3
29efa4e1b9SPhil Edworthy #define CONFIG_SYS_BAUDRATE_TABLE	{ CONFIG_BAUDRATE }
307fbeb642SPhil Edworthy 
31efa4e1b9SPhil Edworthy #define CONFIG_SYS_LONGHELP	1	/* undef to save memory	*/
327fbeb642SPhil Edworthy #define CONFIG_SYS_PROMPT	"=> "	/* Monitor Command Prompt */
337fbeb642SPhil Edworthy #define CONFIG_SYS_CBSIZE	256	/* Buffer size for input from the Console */
347fbeb642SPhil Edworthy #define CONFIG_SYS_PBSIZE	256	/* Buffer size for Console output */
357fbeb642SPhil Edworthy #define CONFIG_SYS_MAXARGS	16	/* max args accepted for monitor commands */
367fbeb642SPhil Edworthy 
37efa4e1b9SPhil Edworthy /* Serial */
387fbeb642SPhil Edworthy #define CONFIG_SCIF_CONSOLE	1
397fbeb642SPhil Edworthy #define CONFIG_CONS_SCIF3	1
407fbeb642SPhil Edworthy 
41efa4e1b9SPhil Edworthy /* Memory */
42efa4e1b9SPhil Edworthy /* u-boot relocated to top 256KB of ram */
43efa4e1b9SPhil Edworthy #define CONFIG_SYS_TEXT_BASE		0x0CFC0000
44efa4e1b9SPhil Edworthy #define CONFIG_SYS_SDRAM_BASE		0x0C000000
457fbeb642SPhil Edworthy #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
467fbeb642SPhil Edworthy 
47efa4e1b9SPhil Edworthy #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
48efa4e1b9SPhil Edworthy #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
497fbeb642SPhil Edworthy #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
50efa4e1b9SPhil Edworthy #define CONFIG_SYS_MONITOR_LEN		(128 * 1024)
51efa4e1b9SPhil Edworthy #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 4*1024*1024)
527fbeb642SPhil Edworthy 
53efa4e1b9SPhil Edworthy /* Flash */
547fbeb642SPhil Edworthy #define CONFIG_FLASH_CFI_DRIVER
557fbeb642SPhil Edworthy #define CONFIG_SYS_FLASH_CFI
567fbeb642SPhil Edworthy #define CONFIG_SYS_FLASH_CFI_WIDTH 	FLASH_CFI_16BIT
57efa4e1b9SPhil Edworthy #define CONFIG_SYS_FLASH_BASE		0x20000000 /* Non-cached */
587fbeb642SPhil Edworthy #define CONFIG_SYS_MAX_FLASH_BANKS	1
59efa4e1b9SPhil Edworthy #define CONFIG_SYS_MAX_FLASH_SECT	512
607fbeb642SPhil Edworthy 
61efa4e1b9SPhil Edworthy #define CONFIG_ENV_IS_IN_FLASH	1
62efa4e1b9SPhil Edworthy #define CONFIG_ENV_OFFSET	(128 * 1024)
63efa4e1b9SPhil Edworthy #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
647fbeb642SPhil Edworthy #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
657fbeb642SPhil Edworthy #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
667fbeb642SPhil Edworthy 
677fbeb642SPhil Edworthy /* Board Clock */
68*117029c5SPhil Edworthy #define CONFIG_SYS_CLK_FREQ	36000000
697fbeb642SPhil Edworthy #define CMT_CLK_DIVIDER		32	/* 8 (default), 32, 128 or 512 */
707fbeb642SPhil Edworthy #define CONFIG_SYS_HZ		(CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER)
717fbeb642SPhil Edworthy 
727fbeb642SPhil Edworthy /* Network interface */
737fbeb642SPhil Edworthy #define CONFIG_SMC911X
747fbeb642SPhil Edworthy #define CONFIG_SMC911X_16_BIT
75efa4e1b9SPhil Edworthy #define CONFIG_SMC911X_BASE	0x28000000
767fbeb642SPhil Edworthy 
777fbeb642SPhil Edworthy #endif	/* __RSK7264_H */
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