1 /* 2 * Configuation settings for the Renesas Technology RSK 7203 3 * 4 * Copyright (C) 2008 Nobuhiro Iwamatsu 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __RSK7203_H 11 #define __RSK7203_H 12 13 #undef DEBUG 14 #define CONFIG_CPU_SH7203 1 15 #define CONFIG_RSK7203 1 16 17 #define CONFIG_CMD_FLASH 18 #define CONFIG_CMD_NET 19 #define CONFIG_CMD_NFS 20 #define CONFIG_CMD_PING 21 #define CONFIG_CMD_SAVEENV 22 #define CONFIG_CMD_SDRAM 23 #define CONFIG_CMD_MEMORY 24 #define CONFIG_CMD_CACHE 25 26 #define CONFIG_BAUDRATE 115200 27 #define CONFIG_BOOTARGS "console=ttySC0,115200" 28 #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ 29 30 #define CONFIG_VERSION_VARIABLE 31 #undef CONFIG_SHOW_BOOT_PROGRESS 32 33 /* MEMORY */ 34 #define RSK7203_SDRAM_BASE 0x0C000000 35 #define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */ 36 #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) 37 38 #define CONFIG_SYS_TEXT_BASE 0x0C7C0000 39 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 40 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 41 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 42 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 43 /* Buffer size for Boot Arguments passed to kernel */ 44 #define CONFIG_SYS_BARGSIZE 512 45 /* List of legal baudrate settings for this board */ 46 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 47 48 /* SCIF */ 49 #define CONFIG_SCIF_CONSOLE 1 50 #define CONFIG_CONS_SCIF0 1 51 52 #define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE 53 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024)) 54 55 #define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE 56 #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 57 58 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024) 59 #define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1 60 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 61 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 62 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 63 64 /* FLASH */ 65 #define CONFIG_FLASH_CFI_DRIVER 66 #define CONFIG_SYS_FLASH_CFI 67 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 68 #undef CONFIG_SYS_FLASH_QUIET_TEST 69 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 70 #define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1 71 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 72 #define CONFIG_SYS_MAX_FLASH_SECT 64 73 #define CONFIG_SYS_MAX_FLASH_BANKS 1 74 75 #define CONFIG_ENV_IS_IN_FLASH 76 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 77 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 78 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 79 #define CONFIG_SYS_FLASH_ERASE_TOUT 12000 80 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 81 82 /* Board Clock */ 83 #define CONFIG_SYS_CLK_FREQ 33333333 84 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 85 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 86 #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 87 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 88 89 /* Network interface */ 90 #define CONFIG_SMC911X 91 #define CONFIG_SMC911X_16_BIT 92 #define CONFIG_SMC911X_BASE (0x24000000) 93 94 #endif /* __RSK7203_H */ 95