1 /* 2 * Configuation settings for the Renesas Technology RSK 7203 3 * 4 * Copyright (C) 2008 Nobuhiro Iwamatsu 5 * Copyright (C) 2008 Renesas Solutions Corp. 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __RSK7203_H 11 #define __RSK7203_H 12 13 #undef DEBUG 14 #define CONFIG_SH2A 1 15 #define CONFIG_CPU_SH7203 1 16 #define CONFIG_RSK7203 1 17 18 #define CONFIG_CMD_FLASH 19 #define CONFIG_CMD_NET 20 #define CONFIG_CMD_NFS 21 #define CONFIG_CMD_PING 22 #define CONFIG_CMD_SAVEENV 23 #define CONFIG_CMD_SDRAM 24 #define CONFIG_CMD_MEMORY 25 #define CONFIG_CMD_CACHE 26 27 #define CONFIG_BAUDRATE 115200 28 #define CONFIG_BOOTARGS "console=ttySC0,115200" 29 #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ 30 31 #define CONFIG_VERSION_VARIABLE 32 #undef CONFIG_SHOW_BOOT_PROGRESS 33 34 /* MEMORY */ 35 #define RSK7203_SDRAM_BASE 0x0C000000 36 #define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */ 37 #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) 38 39 #define CONFIG_SYS_TEXT_BASE 0x0C7C0000 40 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 41 #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ 42 #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ 43 #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ 44 /* Buffer size for Boot Arguments passed to kernel */ 45 #define CONFIG_SYS_BARGSIZE 512 46 /* List of legal baudrate settings for this board */ 47 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 48 49 /* SCIF */ 50 #define CONFIG_SCIF_CONSOLE 1 51 #define CONFIG_CONS_SCIF0 1 52 53 #define CONFIG_SYS_MEMTEST_START RSK7203_SDRAM_BASE 54 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (3 * 1024 * 1024)) 55 56 #define CONFIG_SYS_SDRAM_BASE RSK7203_SDRAM_BASE 57 #define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 58 59 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 1024 * 1024) 60 #define CONFIG_SYS_MONITOR_BASE RSK7203_FLASH_BASE_1 61 #define CONFIG_SYS_MONITOR_LEN (128 * 1024) 62 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 63 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 64 65 /* FLASH */ 66 #define CONFIG_FLASH_CFI_DRIVER 67 #define CONFIG_SYS_FLASH_CFI 68 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 69 #undef CONFIG_SYS_FLASH_QUIET_TEST 70 #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 71 #define CONFIG_SYS_FLASH_BASE RSK7203_FLASH_BASE_1 72 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 73 #define CONFIG_SYS_MAX_FLASH_SECT 64 74 #define CONFIG_SYS_MAX_FLASH_BANKS 1 75 76 #define CONFIG_ENV_IS_IN_FLASH 77 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 78 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 79 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 80 #define CONFIG_SYS_FLASH_ERASE_TOUT 12000 81 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 82 83 /* Board Clock */ 84 #define CONFIG_SYS_CLK_FREQ 33333333 85 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 86 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 87 #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 88 #define CONFIG_SH_CMT_CLK_FREQ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 89 90 /* Network interface */ 91 #define CONFIG_SMC911X 92 #define CONFIG_SMC911X_16_BIT 93 #define CONFIG_SMC911X_BASE (0x24000000) 94 95 #endif /* __RSK7203_H */ 96