1*c655fad0SNobuhiro Iwamatsu /* 2*c655fad0SNobuhiro Iwamatsu * Configuation settings for the Renesas Technology RSK 7203 3*c655fad0SNobuhiro Iwamatsu * 4*c655fad0SNobuhiro Iwamatsu * Copyright (C) 2008 Nobuhiro Iwamatsu 5*c655fad0SNobuhiro Iwamatsu * Copyright (C) 2008 Renesas Solutions Corp. 6*c655fad0SNobuhiro Iwamatsu * 7*c655fad0SNobuhiro Iwamatsu * See file CREDITS for list of people who contributed to this 8*c655fad0SNobuhiro Iwamatsu * project. 9*c655fad0SNobuhiro Iwamatsu * 10*c655fad0SNobuhiro Iwamatsu * This program is free software; you can redistribute it and/or 11*c655fad0SNobuhiro Iwamatsu * modify it under the terms of the GNU General Public License as 12*c655fad0SNobuhiro Iwamatsu * published by the Free Software Foundation; either version 2 of 13*c655fad0SNobuhiro Iwamatsu * the License, or (at your option) any later version. 14*c655fad0SNobuhiro Iwamatsu * 15*c655fad0SNobuhiro Iwamatsu * This program is distributed in the hope that it will be useful, 16*c655fad0SNobuhiro Iwamatsu * but WITHOUT ANY WARRANTY; without even the implied warranty of 17*c655fad0SNobuhiro Iwamatsu * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18*c655fad0SNobuhiro Iwamatsu * GNU General Public License for more details. 19*c655fad0SNobuhiro Iwamatsu * 20*c655fad0SNobuhiro Iwamatsu * You should have received a copy of the GNU General Public License 21*c655fad0SNobuhiro Iwamatsu * along with this program; if not, write to the Free Software 22*c655fad0SNobuhiro Iwamatsu * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23*c655fad0SNobuhiro Iwamatsu * MA 02111-1307 USA 24*c655fad0SNobuhiro Iwamatsu */ 25*c655fad0SNobuhiro Iwamatsu 26*c655fad0SNobuhiro Iwamatsu #ifndef __RSK7203_H 27*c655fad0SNobuhiro Iwamatsu #define __RSK7203_H 28*c655fad0SNobuhiro Iwamatsu 29*c655fad0SNobuhiro Iwamatsu #undef DEBUG 30*c655fad0SNobuhiro Iwamatsu #define CONFIG_SH 1 31*c655fad0SNobuhiro Iwamatsu #define CONFIG_SH2 1 32*c655fad0SNobuhiro Iwamatsu #define CONFIG_SH2A 1 33*c655fad0SNobuhiro Iwamatsu #define CONFIG_CPU_SH7203 1 34*c655fad0SNobuhiro Iwamatsu #define CONFIG_RSK7203 1 35*c655fad0SNobuhiro Iwamatsu 36*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_FLASH 37*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_NET 38*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_NFS 39*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_PING 40*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_ENV 41*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM 42*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_MEMORY 43*c655fad0SNobuhiro Iwamatsu #define CONFIG_CMD_CACHE 44*c655fad0SNobuhiro Iwamatsu 45*c655fad0SNobuhiro Iwamatsu #define CONFIG_BAUDRATE 115200 46*c655fad0SNobuhiro Iwamatsu #define CONFIG_BOOTARGS "console=ttySC0,115200" 47*c655fad0SNobuhiro Iwamatsu #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ 48*c655fad0SNobuhiro Iwamatsu 49*c655fad0SNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE 50*c655fad0SNobuhiro Iwamatsu #undef CONFIG_SHOW_BOOT_PROGRESS 51*c655fad0SNobuhiro Iwamatsu 52*c655fad0SNobuhiro Iwamatsu /* MEMORY */ 53*c655fad0SNobuhiro Iwamatsu #define RSK7203_SDRAM_BASE 0x0C000000 54*c655fad0SNobuhiro Iwamatsu #define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */ 55*c655fad0SNobuhiro Iwamatsu #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) 56*c655fad0SNobuhiro Iwamatsu 57*c655fad0SNobuhiro Iwamatsu #define CFG_LONGHELP /* undef to save memory */ 58*c655fad0SNobuhiro Iwamatsu #define CFG_PROMPT "=> " /* Monitor Command Prompt */ 59*c655fad0SNobuhiro Iwamatsu #define CFG_CBSIZE 256 /* Buffer size for input from the Console */ 60*c655fad0SNobuhiro Iwamatsu #define CFG_PBSIZE 256 /* Buffer size for Console output */ 61*c655fad0SNobuhiro Iwamatsu #define CFG_MAXARGS 16 /* max args accepted for monitor commands */ 62*c655fad0SNobuhiro Iwamatsu /* Buffer size for Boot Arguments passed to kernel */ 63*c655fad0SNobuhiro Iwamatsu #define CFG_BARGSIZE 512 64*c655fad0SNobuhiro Iwamatsu /* List of legal baudrate settings for this board */ 65*c655fad0SNobuhiro Iwamatsu #define CFG_BAUDRATE_TABLE { 115200 } 66*c655fad0SNobuhiro Iwamatsu 67*c655fad0SNobuhiro Iwamatsu /* SCIF */ 68*c655fad0SNobuhiro Iwamatsu #define CFG_SCIF_CONSOLE 1 69*c655fad0SNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0 1 70*c655fad0SNobuhiro Iwamatsu 71*c655fad0SNobuhiro Iwamatsu #define CFG_MEMTEST_START RSK7203_SDRAM_BASE 72*c655fad0SNobuhiro Iwamatsu #define CFG_MEMTEST_END (CFG_MEMTEST_START + (3 * 1024 * 1024)) 73*c655fad0SNobuhiro Iwamatsu 74*c655fad0SNobuhiro Iwamatsu #define CFG_SDRAM_BASE RSK7203_SDRAM_BASE 75*c655fad0SNobuhiro Iwamatsu #define CFG_SDRAM_SIZE (32 * 1024 * 1024) 76*c655fad0SNobuhiro Iwamatsu 77*c655fad0SNobuhiro Iwamatsu #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 1024 * 1024) 78*c655fad0SNobuhiro Iwamatsu #define CFG_MONITOR_BASE RSK7203_FLASH_BASE_1 79*c655fad0SNobuhiro Iwamatsu #define CFG_MONITOR_LEN (128 * 1024) 80*c655fad0SNobuhiro Iwamatsu #define CFG_MALLOC_LEN (256 * 1024) 81*c655fad0SNobuhiro Iwamatsu #define CFG_GBL_DATA_SIZE 256 82*c655fad0SNobuhiro Iwamatsu #define CFG_BOOTMAPSZ (8 * 1024 * 1024) 83*c655fad0SNobuhiro Iwamatsu 84*c655fad0SNobuhiro Iwamatsu /* FLASH */ 85*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_CFI 86*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT 87*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_CFI_DRIVER 88*c655fad0SNobuhiro Iwamatsu #undef CFG_FLASH_QUIET_TEST 89*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ 90*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_BASE RSK7203_FLASH_BASE_1 91*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } 92*c655fad0SNobuhiro Iwamatsu #define CFG_MAX_FLASH_SECT 64 93*c655fad0SNobuhiro Iwamatsu #define CFG_MAX_FLASH_BANKS 1 94*c655fad0SNobuhiro Iwamatsu 95*c655fad0SNobuhiro Iwamatsu #define CFG_ENV_IS_IN_FLASH 96*c655fad0SNobuhiro Iwamatsu #define CFG_ENV_SECT_SIZE (64 * 1024) 97*c655fad0SNobuhiro Iwamatsu #define CFG_ENV_SIZE CFG_ENV_SECT_SIZE 98*c655fad0SNobuhiro Iwamatsu #define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) 99*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_ERASE_TOUT 12000 100*c655fad0SNobuhiro Iwamatsu #define CFG_FLASH_WRITE_TOUT 500 101*c655fad0SNobuhiro Iwamatsu 102*c655fad0SNobuhiro Iwamatsu /* Board Clock */ 103*c655fad0SNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ 33333333 104*c655fad0SNobuhiro Iwamatsu #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 105*c655fad0SNobuhiro Iwamatsu #define CFG_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 106*c655fad0SNobuhiro Iwamatsu 107*c655fad0SNobuhiro Iwamatsu #endif /* __RSK7203_H */ 108