1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4  */
5 
6 #ifndef __CONFIG_RK3399_COMMON_H
7 #define __CONFIG_RK3399_COMMON_H
8 
9 #include "rockchip-common.h"
10 
11 #define CONFIG_NR_DRAM_BANKS		1
12 #define CONFIG_SYS_MALLOC_LEN		(32 << 20)
13 #define CONFIG_SYS_CBSIZE		1024
14 #define CONFIG_SKIP_LOWLEVEL_INIT
15 
16 #define COUNTER_FREQUENCY               24000000
17 
18 #define CONFIG_SYS_NS16550_MEM32
19 
20 #define CONFIG_SYS_INIT_SP_ADDR		0x00300000
21 #define CONFIG_SYS_LOAD_ADDR		0x00800800
22 #define CONFIG_SPL_STACK		0xff8effff
23 #define CONFIG_SPL_TEXT_BASE		0xff8c2000
24 #define CONFIG_SPL_MAX_SIZE		0x30000 - 0x2000
25 /*  BSS setup */
26 #define CONFIG_SPL_BSS_START_ADDR       0xff8e0000
27 #define CONFIG_SPL_BSS_MAX_SIZE         0x10000
28 
29 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* 64M */
30 
31 /* MMC/SD IP block */
32 #define CONFIG_BOUNCE_BUFFER
33 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ	200000000
34 
35 /* RAW SD card / eMMC locations. */
36 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(128 << 10)
37 
38 /* FAT sd card locations. */
39 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
40 #define CONFIG_SYS_SDRAM_BASE		0
41 #define SDRAM_MAX_SIZE			0xf8000000
42 #define CONFIG_NR_DRAM_BANKS		1
43 
44 #define CONFIG_SF_DEFAULT_SPEED 20000000
45 
46 #ifndef CONFIG_SPL_BUILD
47 
48 #define ENV_MEM_LAYOUT_SETTINGS \
49 	"scriptaddr=0x00500000\0" \
50 	"pxefile_addr_r=0x00600000\0" \
51 	"fdt_addr_r=0x01f00000\0" \
52 	"kernel_addr_r=0x02080000\0" \
53 	"ramdisk_addr_r=0x04000000\0"
54 
55 #include <config_distro_bootcmd.h>
56 #define CONFIG_EXTRA_ENV_SETTINGS \
57 	ENV_MEM_LAYOUT_SETTINGS \
58 	"fdtfile=rockchip/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
59 	"partitions=" PARTS_DEFAULT \
60 	BOOTENV
61 
62 #endif
63 
64 /* enable usb config for usb ether */
65 
66 #endif
67