1 /* 2 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3399_COMMON_H 8 #define __CONFIG_RK3399_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SYS_NO_FLASH 13 #define CONFIG_NR_DRAM_BANKS 1 14 #define CONFIG_ENV_SIZE 0x2000 15 #define CONFIG_SYS_MAXARGS 16 16 #define CONFIG_BAUDRATE 1500000 17 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 18 #define CONFIG_SYS_CBSIZE 1024 19 #define CONFIG_SKIP_LOWLEVEL_INIT 20 21 #define CONFIG_SYS_NS16550_MEM32 22 23 #define CONFIG_SYS_TEXT_BASE 0x00200000 24 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 25 #define CONFIG_SYS_LOAD_ADDR 0x00800800 26 27 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 28 29 /* MMC/SD IP block */ 30 #define CONFIG_GENERIC_MMC 31 #define CONFIG_BOUNCE_BUFFER 32 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 33 34 #define CONFIG_SUPPORT_VFAT 35 #define CONFIG_FS_FAT 36 #define CONFIG_FAT_WRITE 37 #define CONFIG_FS_EXT4 38 39 /* RAW SD card / eMMC locations. */ 40 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 41 42 /* FAT sd card locations. */ 43 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 44 #define CONFIG_SYS_SDRAM_BASE 0 45 #define CONFIG_NR_DRAM_BANKS 1 46 47 #define CONFIG_SPI_FLASH 48 #define CONFIG_SPI 49 #define CONFIG_SF_DEFAULT_SPEED 20000000 50 51 #ifndef CONFIG_SPL_BUILD 52 53 #define ENV_MEM_LAYOUT_SETTINGS \ 54 "scriptaddr=0x00000000\0" \ 55 "pxefile_addr_r=0x00100000\0" \ 56 "fdt_addr_r=0x01f00000\0" \ 57 "kernel_addr_r=0x02000000\0" \ 58 "ramdisk_addr_r=0x04000000\0" 59 60 #include <config_distro_bootcmd.h> 61 #define CONFIG_EXTRA_ENV_SETTINGS \ 62 ENV_MEM_LAYOUT_SETTINGS \ 63 "partitions=" PARTS_DEFAULT \ 64 BOOTENV 65 66 #endif 67 68 /* enable usb config for usb ether */ 69 #define CONFIG_USB_HOST_ETHER 70 71 #define CONFIG_USB_ETHER_ASIX 72 #define CONFIG_USB_ETHER_ASIX88179 73 #define CONFIG_USB_ETHER_MCS7830 74 #define CONFIG_USB_ETHER_SMSC95XX 75 #define CONFIG_USB_ETHER_RTL8152 76 77 /* rockchip xhci host driver */ 78 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 79 80 #endif 81