1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2016 Rockchip Electronics Co., Ltd 4 */ 5 6 #ifndef __CONFIG_RK3399_COMMON_H 7 #define __CONFIG_RK3399_COMMON_H 8 9 #include "rockchip-common.h" 10 11 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 12 #define CONFIG_SYS_CBSIZE 1024 13 #define CONFIG_SKIP_LOWLEVEL_INIT 14 15 #define COUNTER_FREQUENCY 24000000 16 17 #define CONFIG_SYS_NS16550_MEM32 18 19 #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 20 #define CONFIG_SYS_LOAD_ADDR 0x00800800 21 #define CONFIG_SPL_STACK 0xff8effff 22 #define CONFIG_SPL_TEXT_BASE 0xff8c2000 23 #define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000 24 /* BSS setup */ 25 #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 26 #define CONFIG_SPL_BSS_MAX_SIZE 0x10000 27 28 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 29 30 /* MMC/SD IP block */ 31 #define CONFIG_ROCKCHIP_SDHCI_MAX_FREQ 200000000 32 33 /* RAW SD card / eMMC locations. */ 34 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 35 36 /* FAT sd card locations. */ 37 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 38 #define CONFIG_SYS_SDRAM_BASE 0 39 #define SDRAM_MAX_SIZE 0xf8000000 40 41 #define CONFIG_SF_DEFAULT_SPEED 20000000 42 43 #ifndef CONFIG_SPL_BUILD 44 45 #define ENV_MEM_LAYOUT_SETTINGS \ 46 "scriptaddr=0x00500000\0" \ 47 "pxefile_addr_r=0x00600000\0" \ 48 "fdt_addr_r=0x01f00000\0" \ 49 "kernel_addr_r=0x02080000\0" \ 50 "ramdisk_addr_r=0x04000000\0" 51 52 #include <config_distro_bootcmd.h> 53 #define CONFIG_EXTRA_ENV_SETTINGS \ 54 ENV_MEM_LAYOUT_SETTINGS \ 55 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ 56 "partitions=" PARTS_DEFAULT \ 57 BOOTENV 58 59 #endif 60 61 /* enable usb config for usb ether */ 62 63 #endif 64