1 /* 2 * (C) Copyright 2015 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3288_COMMON_H 8 #define __CONFIG_RK3288_COMMON_H 9 10 #include <asm/arch/hardware.h> 11 12 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 13 #define CONFIG_SYS_NO_FLASH 14 #define CONFIG_NR_DRAM_BANKS 1 15 #define CONFIG_ENV_SIZE 0x2000 16 #define CONFIG_SYS_MAXARGS 16 17 #define CONFIG_BAUDRATE 115200 18 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 19 #define CONFIG_SYS_CBSIZE 1024 20 #define CONFIG_SYS_THUMB_BUILD 21 22 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 23 #define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ 24 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 25 26 #define CONFIG_SPL_FRAMEWORK 27 #define CONFIG_SYS_NS16550_MEM32 28 #define CONFIG_SPL_BOARD_INIT 29 30 #ifdef CONFIG_ROCKCHIP_SPL_BACK_TO_BROM 31 /* Bootrom will load u-boot binary to 0x0 once return from SPL */ 32 #define CONFIG_SYS_TEXT_BASE 0x00000000 33 #else 34 #define CONFIG_SYS_TEXT_BASE 0x00100000 35 #endif 36 #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 37 #define CONFIG_SYS_LOAD_ADDR 0x00800800 38 #define CONFIG_SPL_STACK 0xff718000 39 #define CONFIG_SPL_TEXT_BASE 0xff704004 40 41 #define CONFIG_SILENT_CONSOLE 42 #ifndef CONFIG_SPL_BUILD 43 # define CONFIG_SYS_CONSOLE_IS_IN_ENV 44 # define CONFIG_CONSOLE_MUX 45 #endif 46 47 /* MMC/SD IP block */ 48 #define CONFIG_MMC 49 #define CONFIG_GENERIC_MMC 50 #define CONFIG_DWMMC 51 #define CONFIG_BOUNCE_BUFFER 52 53 #define CONFIG_FAT_WRITE 54 #define CONFIG_PARTITION_UUIDS 55 #define CONFIG_CMD_PART 56 57 /* RAW SD card / eMMC locations. */ 58 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 59 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 60 61 /* FAT sd card locations. */ 62 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 63 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 64 65 #define CONFIG_SYS_SDRAM_BASE 0 66 #define CONFIG_NR_DRAM_BANKS 1 67 #define SDRAM_BANK_SIZE (2UL << 30) 68 69 #define CONFIG_SPI_FLASH 70 #define CONFIG_SPI 71 #define CONFIG_SF_DEFAULT_SPEED 20000000 72 73 #ifndef CONFIG_SPL_BUILD 74 /* usb otg */ 75 #define CONFIG_USB_GADGET 76 #define CONFIG_USB_GADGET_DUALSPEED 77 #define CONFIG_USB_GADGET_DWC2_OTG 78 #define CONFIG_ROCKCHIP_USB2_PHY 79 #define CONFIG_USB_GADGET_VBUS_DRAW 0 80 81 /* fastboot */ 82 #define CONFIG_CMD_FASTBOOT 83 #define CONFIG_USB_FUNCTION_FASTBOOT 84 #define CONFIG_FASTBOOT_FLASH 85 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 /* eMMC */ 86 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 87 #define CONFIG_FASTBOOT_BUF_SIZE 0x08000000 88 89 /* usb mass storage */ 90 #define CONFIG_USB_FUNCTION_MASS_STORAGE 91 #define CONFIG_CMD_USB_MASS_STORAGE 92 93 #define CONFIG_USB_GADGET_DOWNLOAD 94 #define CONFIG_G_DNL_MANUFACTURER "Rockchip" 95 #define CONFIG_G_DNL_VENDOR_NUM 0x2207 96 #define CONFIG_G_DNL_PRODUCT_NUM 0x320a 97 98 /* Enable gpt partition table */ 99 #define CONFIG_CMD_GPT 100 101 #include <config_distro_defaults.h> 102 103 #define ENV_MEM_LAYOUT_SETTINGS \ 104 "scriptaddr=0x00000000\0" \ 105 "pxefile_addr_r=0x00100000\0" \ 106 "fdt_addr_r=0x01f00000\0" \ 107 "kernel_addr_r=0x02000000\0" \ 108 "ramdisk_addr_r=0x04000000\0" 109 110 #define CONFIG_RANDOM_UUID 111 #define PARTS_DEFAULT \ 112 "uuid_disk=${uuid_gpt_disk};" \ 113 "name=boot,start=8M,size=64M,bootable,uuid=${uuid_gpt_boot};" \ 114 "name=rootfs,size=-,uuid=${uuid_gpt_rootfs};\0" \ 115 116 /* First try to boot from SD (index 0), then eMMC (index 1 */ 117 #define BOOT_TARGET_DEVICES(func) \ 118 func(MMC, mmc, 0) \ 119 func(MMC, mmc, 1) 120 121 #include <config_distro_bootcmd.h> 122 123 /* Linux fails to load the fdt if it's loaded above 512M on a Rock 2 board, so 124 * limit the fdt reallocation to that */ 125 #define CONFIG_EXTRA_ENV_SETTINGS \ 126 "fdt_high=0x1fffffff\0" \ 127 "initrd_high=0x1fffffff\0" \ 128 "partitions=" PARTS_DEFAULT \ 129 ENV_MEM_LAYOUT_SETTINGS \ 130 ROCKCHIP_DEVICE_SETTINGS \ 131 BOOTENV 132 #endif 133 134 #define CONFIG_BOARD_LATE_INIT 135 #define CONFIG_PREBOOT 136 137 #endif 138