1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2015 Google, Inc 4 */ 5 6 #ifndef __CONFIG_RK3188_COMMON_H 7 #define __CONFIG_RK3188_COMMON_H 8 9 #define CONFIG_SYS_CACHELINE_SIZE 64 10 11 #include <asm/arch/hardware.h> 12 #include "rockchip-common.h" 13 14 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 15 #define CONFIG_NR_DRAM_BANKS 1 16 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 17 #define CONFIG_SYS_CBSIZE 1024 18 19 #define CONFIG_SYS_NS16550_MEM32 20 21 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM 22 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ 23 #endif 24 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 25 #define CONFIG_SYS_LOAD_ADDR 0x60800800 26 27 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) 28 #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" 29 30 #define CONFIG_SPL_TEXT_BASE 0x10080800 31 /* spl size 32kb sram - 2kb bootrom */ 32 #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) 33 #define CONFIG_ROCKCHIP_SERIAL 1 34 35 #define CONFIG_SPL_STACK 0x10087fff 36 37 /* MMC/SD IP block */ 38 #define CONFIG_BOUNCE_BUFFER 39 40 #define CONFIG_SYS_SDRAM_BASE 0x60000000 41 #define CONFIG_NR_DRAM_BANKS 1 42 #define SDRAM_BANK_SIZE (2UL << 30) 43 #define SDRAM_MAX_SIZE 0x80000000 44 45 #define CONFIG_SPI_FLASH 46 #define CONFIG_SF_DEFAULT_SPEED 20000000 47 48 #ifndef CONFIG_SPL_BUILD 49 /* usb otg */ 50 51 /* usb host support */ 52 #define ENV_MEM_LAYOUT_SETTINGS \ 53 "scriptaddr=0x60000000\0" \ 54 "pxefile_addr_r=0x60100000\0" \ 55 "fdt_addr_r=0x61f00000\0" \ 56 "kernel_addr_r=0x62000000\0" \ 57 "ramdisk_addr_r=0x64000000\0" 58 59 #include <config_distro_bootcmd.h> 60 61 /* Linux fails to load the fdt if it's loaded above 256M on a Rock board, 62 * so limit the fdt reallocation to that */ 63 #define CONFIG_EXTRA_ENV_SETTINGS \ 64 "fdt_high=0x6fffffff\0" \ 65 "initrd_high=0x6fffffff\0" \ 66 "partitions=" PARTS_DEFAULT \ 67 ENV_MEM_LAYOUT_SETTINGS \ 68 ROCKCHIP_DEVICE_SETTINGS \ 69 BOOTENV 70 71 #endif /* CONFIG_SPL_BUILD */ 72 73 #define CONFIG_PREBOOT 74 75 #endif 76