1 /* 2 * (C) Copyright 2015 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3188_COMMON_H 8 #define __CONFIG_RK3188_COMMON_H 9 10 #define CONFIG_SYS_CACHELINE_SIZE 64 11 12 #include <asm/arch/hardware.h> 13 #include "rockchip-common.h" 14 15 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 16 #define CONFIG_NR_DRAM_BANKS 1 17 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 18 #define CONFIG_SYS_CBSIZE 1024 19 20 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 21 #define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */ 22 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 23 #define CONFIG_SYS_TIMER_COUNTS_DOWN 24 25 #define CONFIG_SYS_NS16550_MEM32 26 27 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM 28 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ 29 #endif 30 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 31 #define CONFIG_SYS_LOAD_ADDR 0x60800800 32 33 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) 34 #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" 35 36 #define CONFIG_SPL_TEXT_BASE 0x10080800 37 /* spl size 32kb sram - 2kb bootrom */ 38 #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) 39 #define CONFIG_ROCKCHIP_SERIAL 1 40 41 #define CONFIG_SPL_STACK 0x10087fff 42 43 /* MMC/SD IP block */ 44 #define CONFIG_BOUNCE_BUFFER 45 46 #define CONFIG_SYS_SDRAM_BASE 0x60000000 47 #define CONFIG_NR_DRAM_BANKS 1 48 #define SDRAM_BANK_SIZE (2UL << 30) 49 #define SDRAM_MAX_SIZE 0x80000000 50 51 #define CONFIG_SPI_FLASH 52 #define CONFIG_SPI 53 #define CONFIG_SF_DEFAULT_SPEED 20000000 54 55 #ifndef CONFIG_SPL_BUILD 56 /* usb otg */ 57 58 /* usb host support */ 59 #define ENV_MEM_LAYOUT_SETTINGS \ 60 "scriptaddr=0x60000000\0" \ 61 "pxefile_addr_r=0x60100000\0" \ 62 "fdt_addr_r=0x61f00000\0" \ 63 "kernel_addr_r=0x62000000\0" \ 64 "ramdisk_addr_r=0x64000000\0" 65 66 #include <config_distro_bootcmd.h> 67 68 /* Linux fails to load the fdt if it's loaded above 256M on a Rock board, 69 * so limit the fdt reallocation to that */ 70 #define CONFIG_EXTRA_ENV_SETTINGS \ 71 "fdt_high=0x6fffffff\0" \ 72 "initrd_high=0x6fffffff\0" \ 73 "partitions=" PARTS_DEFAULT \ 74 ENV_MEM_LAYOUT_SETTINGS \ 75 ROCKCHIP_DEVICE_SETTINGS \ 76 BOOTENV 77 78 #endif /* CONFIG_SPL_BUILD */ 79 80 #define CONFIG_PREBOOT 81 82 #endif 83