1 /* 2 * (C) Copyright 2015 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3188_COMMON_H 8 #define __CONFIG_RK3188_COMMON_H 9 10 #define CONFIG_SYS_CACHELINE_SIZE 64 11 12 #include <asm/arch/hardware.h> 13 #include "rockchip-common.h" 14 15 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 16 #define CONFIG_NR_DRAM_BANKS 1 17 #define CONFIG_ENV_SIZE 0x2000 18 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 19 #define CONFIG_SYS_CBSIZE 1024 20 21 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 22 #define CONFIG_SYS_TIMER_BASE 0x2000e000 /* TIMER3 */ 23 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 24 #define CONFIG_SYS_TIMER_COUNTS_DOWN 25 26 #define CONFIG_SYS_NS16550_MEM32 27 28 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM 29 /* Bootrom will load u-boot binary to 0x60000000 once return from SPL */ 30 #define CONFIG_SYS_TEXT_BASE 0x60000000 31 #else 32 #define CONFIG_SYS_TEXT_BASE 0x60100000 33 #endif 34 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 35 #define CONFIG_SYS_LOAD_ADDR 0x60800800 36 37 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) 38 #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" 39 40 #ifdef CONFIG_TPL_BUILD 41 #define CONFIG_SPL_TEXT_BASE 0x10080804 42 /* tpl size 1kb - 4byte RK31 header */ 43 #define CONFIG_SPL_MAX_SIZE (0x400 - 0x4) 44 #elif defined(CONFIG_SPL_BUILD) 45 /* spl size 32kb sram - 2kb bootrom - 1kb spl */ 46 #define CONFIG_SPL_MAX_SIZE (0x8000 - 0xC00) 47 #define CONFIG_SPL_TEXT_BASE 0x10080C00 48 #define CONFIG_SPL_FRAMEWORK 1 49 #define CONFIG_SPL_CLK 1 50 #define CONFIG_SPL_PINCTRL 1 51 #define CONFIG_SPL_REGMAP 1 52 #define CONFIG_SPL_SYSCON 1 53 #define CONFIG_SPL_RAM 1 54 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT 1 55 #define CONFIG_ROCKCHIP_SERIAL 1 56 #endif 57 58 #define CONFIG_SPL_STACK 0x10087fff 59 60 /* MMC/SD IP block */ 61 #define CONFIG_BOUNCE_BUFFER 62 63 #define CONFIG_SYS_SDRAM_BASE 0x60000000 64 #define CONFIG_NR_DRAM_BANKS 1 65 #define SDRAM_BANK_SIZE (2UL << 30) 66 #define SDRAM_MAX_SIZE 0x80000000 67 68 #define CONFIG_SPI_FLASH 69 #define CONFIG_SPI 70 #define CONFIG_SF_DEFAULT_SPEED 20000000 71 72 #ifndef CONFIG_SPL_BUILD 73 /* usb otg */ 74 #define CONFIG_ROCKCHIP_USB2_PHY 75 76 /* usb host support */ 77 #define ENV_MEM_LAYOUT_SETTINGS \ 78 "scriptaddr=0x60000000\0" \ 79 "pxefile_addr_r=0x60100000\0" \ 80 "fdt_addr_r=0x61f00000\0" \ 81 "kernel_addr_r=0x62000000\0" \ 82 "ramdisk_addr_r=0x64000000\0" 83 84 #include <config_distro_bootcmd.h> 85 86 /* Linux fails to load the fdt if it's loaded above 256M on a Rock board, 87 * so limit the fdt reallocation to that */ 88 #define CONFIG_EXTRA_ENV_SETTINGS \ 89 "fdt_high=0x6fffffff\0" \ 90 "initrd_high=0x6fffffff\0" \ 91 "partitions=" PARTS_DEFAULT \ 92 ENV_MEM_LAYOUT_SETTINGS \ 93 ROCKCHIP_DEVICE_SETTINGS \ 94 BOOTENV 95 96 #endif /* CONFIG_SPL_BUILD */ 97 98 #define CONFIG_PREBOOT 99 100 #endif 101