1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RK3128_COMMON_H 8 #define __CONFIG_RK3128_COMMON_H 9 10 #include "rockchip-common.h" 11 12 #define CONFIG_SYS_MAXARGS 16 13 #define CONFIG_BAUDRATE 115200 14 #define CONFIG_SYS_MALLOC_LEN (32 << 20) 15 #define CONFIG_SYS_CBSIZE 1024 16 #define CONFIG_SKIP_LOWLEVEL_INIT 17 18 #define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) 19 #define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ 20 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) 21 22 #define CONFIG_SYS_NS16550_MEM32 23 24 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 25 #define CONFIG_SYS_LOAD_ADDR 0x60800800 26 27 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ 28 29 /* MMC/SD IP block */ 30 #define CONFIG_BOUNCE_BUFFER 31 32 /* RAW SD card / eMMC locations. */ 33 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 34 35 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 36 #define CONFIG_SYS_SDRAM_BASE 0x60000000 37 #define CONFIG_NR_DRAM_BANKS 2 38 #define SDRAM_MAX_SIZE 0x80000000 39 40 #define CONFIG_SPI_FLASH 41 #define CONFIG_SPI 42 #define CONFIG_SF_DEFAULT_SPEED 20000000 43 #define CONFIG_USB_OHCI_NEW 44 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 45 46 #ifndef CONFIG_SPL_BUILD 47 48 /* usb mass storage */ 49 50 #define ENV_MEM_LAYOUT_SETTINGS \ 51 "scriptaddr=0x60500000\0" \ 52 "pxefile_addr_r=0x60600000\0" \ 53 "fdt_addr_r=0x61f00000\0" \ 54 "kernel_addr_r=0x62000000\0" \ 55 "ramdisk_addr_r=0x64000000\0" 56 57 #include <config_distro_bootcmd.h> 58 #define CONFIG_EXTRA_ENV_SETTINGS \ 59 ENV_MEM_LAYOUT_SETTINGS \ 60 "partitions=" PARTS_DEFAULT \ 61 BOOTENV 62 63 #endif 64 65 #endif 66