1 /* 2 * Configuation settings for the Renesas R7780MP board 3 * 4 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __R7780RP_H 11 #define __R7780RP_H 12 13 #undef DEBUG 14 #define CONFIG_CPU_SH7780 1 15 #define CONFIG_R7780MP 1 16 #define CONFIG_SYS_R7780MP_OLD_FLASH 1 17 #define __LITTLE_ENDIAN__ 1 18 19 /* 20 * Command line configuration. 21 */ 22 #define CONFIG_CMD_SDRAM 23 #define CONFIG_CMD_FLASH 24 #define CONFIG_CMD_MEMORY 25 #define CONFIG_CMD_PCI 26 #define CONFIG_CMD_NET 27 #define CONFIG_CMD_PING 28 #define CONFIG_CMD_SAVEENV 29 #define CONFIG_CMD_NFS 30 #define CONFIG_CMD_IDE 31 #define CONFIG_CMD_EXT2 32 #define CONFIG_DOS_PARTITION 33 34 #define CONFIG_SCIF_CONSOLE 1 35 #define CONFIG_BAUDRATE 115200 36 #define CONFIG_CONS_SCIF0 1 37 38 #define CONFIG_BOOTDELAY 3 39 #define CONFIG_BOOTARGS "console=ttySC0,115200" 40 #define CONFIG_ENV_OVERWRITE 1 41 42 /* check for keypress on bootdelay==0 */ 43 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/ 44 45 #define CONFIG_SYS_TEXT_BASE 0x0FFC0000 46 #define CONFIG_SYS_SDRAM_BASE (0x08000000) 47 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 48 49 #define CONFIG_SYS_LONGHELP 50 #define CONFIG_SYS_CBSIZE 256 51 #define CONFIG_SYS_PBSIZE 256 52 #define CONFIG_SYS_MAXARGS 16 53 #define CONFIG_SYS_BARGSIZE 512 54 55 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 56 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 57 58 /* Flash board support */ 59 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 60 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH 61 /* NOR Flash (S29PL127J60TFI130) */ 62 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 63 # define CONFIG_SYS_MAX_FLASH_BANKS (2) 64 # define CONFIG_SYS_MAX_FLASH_SECT 270 65 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ 66 CONFIG_SYS_FLASH_BASE + 0x100000,\ 67 CONFIG_SYS_FLASH_BASE + 0x400000,\ 68 CONFIG_SYS_FLASH_BASE + 0x700000, } 69 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */ 70 /* NOR Flash (Spantion S29GL256P) */ 71 # define CONFIG_SYS_MAX_FLASH_BANKS (1) 72 # define CONFIG_SYS_MAX_FLASH_SECT 256 73 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 74 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ 75 76 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 77 /* Address of u-boot image in Flash */ 78 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 79 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 80 /* Size of DRAM reserved for malloc() use */ 81 #define CONFIG_SYS_MALLOC_LEN (1204 * 1024) 82 83 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 84 #define CONFIG_SYS_RX_ETH_BUFFER (8) 85 86 #define CONFIG_SYS_FLASH_CFI 87 #define CONFIG_FLASH_CFI_DRIVER 88 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE 89 #undef CONFIG_SYS_FLASH_QUIET_TEST 90 /* print 'E' for empty sector on flinfo */ 91 #define CONFIG_SYS_FLASH_EMPTY_INFO 92 93 #define CONFIG_ENV_IS_IN_FLASH 94 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 95 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 96 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 97 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 98 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 99 100 /* Board Clock */ 101 #define CONFIG_SYS_CLK_FREQ 33333333 102 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 103 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 104 #define CONFIG_SYS_TMU_CLK_DIV 4 105 106 /* PCI Controller */ 107 #if defined(CONFIG_CMD_PCI) 108 #define CONFIG_PCI 109 #define CONFIG_SH4_PCI 110 #define CONFIG_SH7780_PCI 111 #define CONFIG_SH7780_PCI_LSR 0x07f00001 112 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE 113 #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE 114 #define CONFIG_PCI_PNP 115 #define CONFIG_PCI_SCAN_SHOW 1 116 #define __io 117 #define __mem_pci 118 119 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ 120 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS 121 #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ 122 123 #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ 124 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS 125 #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ 126 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE 127 #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE 128 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE 129 #endif /* CONFIG_CMD_PCI */ 130 131 #if defined(CONFIG_CMD_NET) 132 /* 133 #define CONFIG_RTL8169 134 */ 135 /* AX88796L Support(NE2000 base chip) */ 136 #define CONFIG_DRIVER_AX88796L 137 #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 138 #endif 139 140 /* Compact flash Support */ 141 #if defined(CONFIG_CMD_IDE) 142 #define CONFIG_IDE_RESET 1 143 #define CONFIG_SYS_PIO_MODE 1 144 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 145 #define CONFIG_SYS_IDE_MAXDEVICE 1 146 #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 147 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 148 #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ 149 #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ 150 #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ 151 #define CONFIG_IDE_SWAP_IO 152 #endif /* CONFIG_CMD_IDE */ 153 154 #endif /* __R7780RP_H */ 155