1 /* 2 * Configuation settings for the Renesas R7780MP board 3 * 4 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> 6 * 7 * See file CREDITS for list of people who contributed to this 8 * project. 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License as 12 * published by the Free Software Foundation; either version 2 of 13 * the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 23 * MA 02111-1307 USA 24 */ 25 26 #ifndef __R7780RP_H 27 #define __R7780RP_H 28 29 #undef DEBUG 30 #define CONFIG_SH 1 31 #define CONFIG_SH4A 1 32 #define CONFIG_CPU_SH7780 1 33 #define CONFIG_R7780MP 1 34 #define CONFIG_SYS_R7780MP_OLD_FLASH 1 35 #define __LITTLE_ENDIAN__ 1 36 37 /* 38 * Command line configuration. 39 */ 40 #define CONFIG_CMD_SDRAM 41 #define CONFIG_CMD_FLASH 42 #define CONFIG_CMD_MEMORY 43 #define CONFIG_CMD_PCI 44 #define CONFIG_CMD_NET 45 #define CONFIG_CMD_PING 46 #define CONFIG_CMD_SAVEENV 47 #define CONFIG_CMD_NFS 48 #define CONFIG_CMD_IDE 49 #define CONFIG_CMD_EXT2 50 #define CONFIG_DOS_PARTITION 51 52 #define CONFIG_SCIF_CONSOLE 1 53 #define CONFIG_BAUDRATE 115200 54 #define CONFIG_CONS_SCIF0 1 55 56 #define CONFIG_BOOTDELAY 3 57 #define CONFIG_BOOTARGS "console=ttySC0,115200" 58 #define CONFIG_ENV_OVERWRITE 1 59 60 /* check for keypress on bootdelay==0 */ 61 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/ 62 63 #define CONFIG_SYS_TEXT_BASE 0x0FFC0000 64 #define CONFIG_SYS_SDRAM_BASE (0x08000000) 65 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 66 67 #define CONFIG_SYS_LONGHELP 68 #define CONFIG_SYS_PROMPT "=> " 69 #define CONFIG_SYS_CBSIZE 256 70 #define CONFIG_SYS_PBSIZE 256 71 #define CONFIG_SYS_MAXARGS 16 72 #define CONFIG_SYS_BARGSIZE 512 73 /* List of legal baudrate settings for this board */ 74 #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 57600, 38400, 19200, 9600 } 75 76 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 77 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 78 79 /* Flash board support */ 80 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 81 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH 82 /* NOR Flash (S29PL127J60TFI130) */ 83 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 84 # define CONFIG_SYS_MAX_FLASH_BANKS (2) 85 # define CONFIG_SYS_MAX_FLASH_SECT 270 86 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ 87 CONFIG_SYS_FLASH_BASE + 0x100000,\ 88 CONFIG_SYS_FLASH_BASE + 0x400000,\ 89 CONFIG_SYS_FLASH_BASE + 0x700000, } 90 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */ 91 /* NOR Flash (Spantion S29GL256P) */ 92 # define CONFIG_SYS_MAX_FLASH_BANKS (1) 93 # define CONFIG_SYS_MAX_FLASH_SECT 256 94 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 95 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ 96 97 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 98 /* Address of u-boot image in Flash */ 99 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 100 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 101 /* Size of DRAM reserved for malloc() use */ 102 #define CONFIG_SYS_MALLOC_LEN (1204 * 1024) 103 104 /* size in bytes reserved for initial data */ 105 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 106 #define CONFIG_SYS_RX_ETH_BUFFER (8) 107 108 #define CONFIG_SYS_FLASH_CFI 109 #define CONFIG_FLASH_CFI_DRIVER 110 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE 111 #undef CONFIG_SYS_FLASH_QUIET_TEST 112 /* print 'E' for empty sector on flinfo */ 113 #define CONFIG_SYS_FLASH_EMPTY_INFO 114 115 #define CONFIG_ENV_IS_IN_FLASH 116 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 117 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 118 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 119 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 120 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 121 122 /* Board Clock */ 123 #define CONFIG_SYS_CLK_FREQ 33333333 124 #define CONFIG_SYS_TMU_CLK_DIV 4 125 #define CONFIG_SYS_HZ 1000 126 127 /* PCI Controller */ 128 #if defined(CONFIG_CMD_PCI) 129 #define CONFIG_PCI 130 #define CONFIG_SH4_PCI 131 #define CONFIG_SH7780_PCI 132 #define CONFIG_SH7780_PCI_LSR 0x07f00001 133 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE 134 #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE 135 #define CONFIG_PCI_PNP 136 #define CONFIG_PCI_SCAN_SHOW 1 137 #define __io 138 #define __mem_pci 139 140 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ 141 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS 142 #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ 143 144 #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ 145 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS 146 #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ 147 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE 148 #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE 149 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE 150 #endif /* CONFIG_CMD_PCI */ 151 152 #if defined(CONFIG_CMD_NET) 153 /* 154 #define CONFIG_NET_MULTI 155 #define CONFIG_RTL8169 156 */ 157 /* AX88796L Support(NE2000 base chip) */ 158 #define CONFIG_DRIVER_AX88796L 159 #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 160 #endif 161 162 /* Compact flash Support */ 163 #if defined(CONFIG_CMD_IDE) 164 #define CONFIG_IDE_RESET 1 165 #define CONFIG_SYS_PIO_MODE 1 166 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 167 #define CONFIG_SYS_IDE_MAXDEVICE 1 168 #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 169 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 170 #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ 171 #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ 172 #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ 173 #define CONFIG_IDE_SWAP_IO 174 #endif /* CONFIG_CMD_IDE */ 175 176 #endif /* __R7780RP_H */ 177