1 /* 2 * Configuation settings for the Renesas R7780MP board 3 * 4 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __R7780RP_H 11 #define __R7780RP_H 12 13 #define CONFIG_CPU_SH7780 1 14 #define CONFIG_R7780MP 1 15 #define CONFIG_SYS_R7780MP_OLD_FLASH 1 16 #define __LITTLE_ENDIAN__ 1 17 18 #define CONFIG_DISPLAY_BOARDINFO 19 20 /* 21 * Command line configuration. 22 */ 23 #define CONFIG_CMD_SDRAM 24 #define CONFIG_CMD_PCI 25 26 #define CONFIG_CONS_SCIF0 1 27 28 #define CONFIG_BOOTARGS "console=ttySC0,115200" 29 #define CONFIG_ENV_OVERWRITE 1 30 31 #define CONFIG_SYS_TEXT_BASE 0x0FFC0000 32 #define CONFIG_SYS_SDRAM_BASE (0x08000000) 33 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 34 35 #define CONFIG_SYS_LONGHELP 36 #define CONFIG_SYS_CBSIZE 256 37 #define CONFIG_SYS_PBSIZE 256 38 #define CONFIG_SYS_MAXARGS 16 39 #define CONFIG_SYS_BARGSIZE 512 40 41 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 42 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 43 44 /* Flash board support */ 45 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 46 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH 47 /* NOR Flash (S29PL127J60TFI130) */ 48 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 49 # define CONFIG_SYS_MAX_FLASH_BANKS (2) 50 # define CONFIG_SYS_MAX_FLASH_SECT 270 51 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ 52 CONFIG_SYS_FLASH_BASE + 0x100000,\ 53 CONFIG_SYS_FLASH_BASE + 0x400000,\ 54 CONFIG_SYS_FLASH_BASE + 0x700000, } 55 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */ 56 /* NOR Flash (Spantion S29GL256P) */ 57 # define CONFIG_SYS_MAX_FLASH_BANKS (1) 58 # define CONFIG_SYS_MAX_FLASH_SECT 256 59 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 60 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ 61 62 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 63 /* Address of u-boot image in Flash */ 64 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 65 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 66 /* Size of DRAM reserved for malloc() use */ 67 #define CONFIG_SYS_MALLOC_LEN (1204 * 1024) 68 69 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 70 #define CONFIG_SYS_RX_ETH_BUFFER (8) 71 72 #define CONFIG_SYS_FLASH_CFI 73 #define CONFIG_FLASH_CFI_DRIVER 74 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE 75 #undef CONFIG_SYS_FLASH_QUIET_TEST 76 /* print 'E' for empty sector on flinfo */ 77 #define CONFIG_SYS_FLASH_EMPTY_INFO 78 79 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 80 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 81 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 82 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 83 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 84 85 /* Board Clock */ 86 #define CONFIG_SYS_CLK_FREQ 33333333 87 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 88 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 89 #define CONFIG_SYS_TMU_CLK_DIV 4 90 91 /* PCI Controller */ 92 #if defined(CONFIG_CMD_PCI) 93 #define CONFIG_SH4_PCI 94 #define CONFIG_SH7780_PCI 95 #define CONFIG_SH7780_PCI_LSR 0x07f00001 96 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE 97 #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE 98 #define CONFIG_PCI_SCAN_SHOW 1 99 #define __mem_pci 100 101 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ 102 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS 103 #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ 104 105 #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ 106 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS 107 #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ 108 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE 109 #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE 110 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE 111 #endif /* CONFIG_CMD_PCI */ 112 113 #if defined(CONFIG_CMD_NET) 114 /* AX88796L Support(NE2000 base chip) */ 115 #define CONFIG_DRIVER_AX88796L 116 #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 117 #endif 118 119 /* Compact flash Support */ 120 #if defined(CONFIG_IDE) 121 #define CONFIG_IDE_RESET 1 122 #define CONFIG_SYS_PIO_MODE 1 123 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 124 #define CONFIG_SYS_IDE_MAXDEVICE 1 125 #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 126 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 127 #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ 128 #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ 129 #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ 130 #define CONFIG_IDE_SWAP_IO 131 #endif /* CONFIG_IDE */ 132 133 #endif /* __R7780RP_H */ 134