1 /* 2 * Configuation settings for the Renesas R7780MP board 3 * 4 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 5 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10 #ifndef __R7780RP_H 11 #define __R7780RP_H 12 13 #undef DEBUG 14 #define CONFIG_CPU_SH7780 1 15 #define CONFIG_R7780MP 1 16 #define CONFIG_SYS_R7780MP_OLD_FLASH 1 17 #define __LITTLE_ENDIAN__ 1 18 19 /* 20 * Command line configuration. 21 */ 22 #define CONFIG_CMD_SDRAM 23 #define CONFIG_CMD_FLASH 24 #define CONFIG_CMD_MEMORY 25 #define CONFIG_CMD_PCI 26 #define CONFIG_CMD_PING 27 #define CONFIG_CMD_SAVEENV 28 #define CONFIG_CMD_NFS 29 #define CONFIG_CMD_IDE 30 #define CONFIG_CMD_EXT2 31 #define CONFIG_DOS_PARTITION 32 33 #define CONFIG_SCIF_CONSOLE 1 34 #define CONFIG_BAUDRATE 115200 35 #define CONFIG_CONS_SCIF0 1 36 37 #define CONFIG_BOOTDELAY 3 38 #define CONFIG_BOOTARGS "console=ttySC0,115200" 39 #define CONFIG_ENV_OVERWRITE 1 40 41 /* check for keypress on bootdelay==0 */ 42 /*#define CONFIG_ZERO_BOOTDELAY_CHECK*/ 43 44 #define CONFIG_SYS_TEXT_BASE 0x0FFC0000 45 #define CONFIG_SYS_SDRAM_BASE (0x08000000) 46 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 47 48 #define CONFIG_SYS_LONGHELP 49 #define CONFIG_SYS_CBSIZE 256 50 #define CONFIG_SYS_PBSIZE 256 51 #define CONFIG_SYS_MAXARGS 16 52 #define CONFIG_SYS_BARGSIZE 512 53 54 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 55 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 56 57 /* Flash board support */ 58 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 59 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH 60 /* NOR Flash (S29PL127J60TFI130) */ 61 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 62 # define CONFIG_SYS_MAX_FLASH_BANKS (2) 63 # define CONFIG_SYS_MAX_FLASH_SECT 270 64 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\ 65 CONFIG_SYS_FLASH_BASE + 0x100000,\ 66 CONFIG_SYS_FLASH_BASE + 0x400000,\ 67 CONFIG_SYS_FLASH_BASE + 0x700000, } 68 #else /* CONFIG_SYS_R7780MP_OLD_FLASH */ 69 /* NOR Flash (Spantion S29GL256P) */ 70 # define CONFIG_SYS_MAX_FLASH_BANKS (1) 71 # define CONFIG_SYS_MAX_FLASH_SECT 256 72 # define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 73 #endif /* CONFIG_SYS_R7780MP_OLD_FLASH */ 74 75 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) 76 /* Address of u-boot image in Flash */ 77 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 78 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 79 /* Size of DRAM reserved for malloc() use */ 80 #define CONFIG_SYS_MALLOC_LEN (1204 * 1024) 81 82 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 83 #define CONFIG_SYS_RX_ETH_BUFFER (8) 84 85 #define CONFIG_SYS_FLASH_CFI 86 #define CONFIG_FLASH_CFI_DRIVER 87 #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE 88 #undef CONFIG_SYS_FLASH_QUIET_TEST 89 /* print 'E' for empty sector on flinfo */ 90 #define CONFIG_SYS_FLASH_EMPTY_INFO 91 92 #define CONFIG_ENV_IS_IN_FLASH 93 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 94 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 95 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) 96 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 97 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 98 99 /* Board Clock */ 100 #define CONFIG_SYS_CLK_FREQ 33333333 101 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 102 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 103 #define CONFIG_SYS_TMU_CLK_DIV 4 104 105 /* PCI Controller */ 106 #if defined(CONFIG_CMD_PCI) 107 #define CONFIG_PCI 108 #define CONFIG_SH4_PCI 109 #define CONFIG_SH7780_PCI 110 #define CONFIG_SH7780_PCI_LSR 0x07f00001 111 #define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE 112 #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE 113 #define CONFIG_PCI_PNP 114 #define CONFIG_PCI_SCAN_SHOW 1 115 #define __io 116 #define __mem_pci 117 118 #define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ 119 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS 120 #define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ 121 122 #define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ 123 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS 124 #define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ 125 #define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE 126 #define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE 127 #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE 128 #endif /* CONFIG_CMD_PCI */ 129 130 #if defined(CONFIG_CMD_NET) 131 /* 132 #define CONFIG_RTL8169 133 */ 134 /* AX88796L Support(NE2000 base chip) */ 135 #define CONFIG_DRIVER_AX88796L 136 #define CONFIG_DRIVER_NE2000_BASE 0xA4100000 137 #endif 138 139 /* Compact flash Support */ 140 #if defined(CONFIG_CMD_IDE) 141 #define CONFIG_IDE_RESET 1 142 #define CONFIG_SYS_PIO_MODE 1 143 #define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */ 144 #define CONFIG_SYS_IDE_MAXDEVICE 1 145 #define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000 146 #define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */ 147 #define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */ 148 #define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */ 149 #define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */ 150 #define CONFIG_IDE_SWAP_IO 151 #endif /* CONFIG_CMD_IDE */ 152 153 #endif /* __R7780RP_H */ 154