1 /* 2 * Configuation settings for the Renesas Solutions r0p7734 board 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __R0P7734_H 10 #define __R0P7734_H 11 12 #undef DEBUG 13 #define CONFIG_CPU_SH7734 1 14 #define CONFIG_R0P7734 1 15 #define CONFIG_400MHZ_MODE 1 16 /* #define CONFIG_533MHZ_MODE 1 */ 17 18 #define CONFIG_BOARD_LATE_INIT 19 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 20 21 #define CONFIG_CMD_SDRAM 22 #define CONFIG_CMD_ENV 23 24 #define CONFIG_BAUDRATE 115200 25 #define CONFIG_BOOTDELAY 3 26 #define CONFIG_BOOTARGS "console=ttySC3,115200" 27 28 #define CONFIG_VERSION_VARIABLE 29 #undef CONFIG_SHOW_BOOT_PROGRESS 30 31 /* Ether */ 32 #define CONFIG_SH_ETHER 1 33 #define CONFIG_SH_ETHER_USE_PORT (0) 34 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 35 #define CONFIG_PHYLIB 36 #define CONFIG_PHY_SMSC 1 37 #define CONFIG_BITBANGMII 38 #define CONFIG_BITBANGMII_MULTI 39 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ 40 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 41 #ifndef CONFIG_SH_ETHER 42 # define CONFIG_SMC911X 43 # define CONFIG_SMC911X_16_BIT 44 # define CONFIG_SMC911X_BASE (0x84000000) 45 #endif 46 47 /* I2C */ 48 #define CONFIG_SH_SH7734_I2C 1 49 #define CONFIG_HARD_I2C 1 50 #define CONFIG_I2C_MULTI_BUS 1 51 #define CONFIG_SYS_MAX_I2C_BUS 2 52 #define CONFIG_SYS_I2C_MODULE 0 53 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ 54 #define CONFIG_SYS_I2C_SLAVE 0x50 55 #define CONFIG_SH_I2C_DATA_HIGH 4 56 #define CONFIG_SH_I2C_DATA_LOW 5 57 #define CONFIG_SH_I2C_CLOCK 500000000 58 #define CONFIG_SH_I2C_BASE0 0xFFC70000 59 #define CONFIG_SH_I2C_BASE1 0xFFC7100 60 61 /* undef to save memory */ 62 #define CONFIG_SYS_LONGHELP 63 /* Monitor Command Prompt */ 64 /* Buffer size for input from the Console */ 65 #define CONFIG_SYS_CBSIZE 256 66 /* Buffer size for Console output */ 67 #define CONFIG_SYS_PBSIZE 256 68 /* max args accepted for monitor commands */ 69 #define CONFIG_SYS_MAXARGS 16 70 /* Buffer size for Boot Arguments passed to kernel */ 71 #define CONFIG_SYS_BARGSIZE 512 72 /* List of legal baudrate settings for this board */ 73 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 74 75 /* SCIF */ 76 #define CONFIG_SCIF_CONSOLE 1 77 #define CONFIG_SCIF 1 78 #define CONFIG_CONS_SCIF3 1 79 80 /* Suppress display of console information at boot */ 81 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 82 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 83 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 84 85 /* SDRAM */ 86 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 87 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 88 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 89 90 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 91 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) 92 /* Enable alternate, more extensive, memory test */ 93 #undef CONFIG_SYS_ALT_MEMTEST 94 /* Scratch address used by the alternate memory test */ 95 #undef CONFIG_SYS_MEMTEST_SCRATCH 96 97 /* Enable temporary baudrate change while serial download */ 98 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 99 100 /* FLASH */ 101 #define CONFIG_FLASH_CFI_DRIVER 1 102 #define CONFIG_SYS_FLASH_CFI 103 #undef CONFIG_SYS_FLASH_QUIET_TEST 104 #define CONFIG_SYS_FLASH_EMPTY_INFO 105 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 106 #define CONFIG_SYS_MAX_FLASH_SECT 512 107 108 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 109 #define CONFIG_SYS_MAX_FLASH_BANKS 1 110 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 111 112 /* Timeout for Flash erase operations (in ms) */ 113 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 114 /* Timeout for Flash write operations (in ms) */ 115 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 116 /* Timeout for Flash set sector lock bit operations (in ms) */ 117 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 118 /* Timeout for Flash clear lock bit operations (in ms) */ 119 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 120 121 /* 122 * Use hardware flash sectors protection instead 123 * of U-Boot software protection 124 */ 125 #undef CONFIG_SYS_FLASH_PROTECTION 126 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 127 128 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 129 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 130 /* Monitor size */ 131 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 132 /* Size of DRAM reserved for malloc() use */ 133 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 134 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 135 136 /* ENV setting */ 137 #define CONFIG_ENV_IS_IN_FLASH 138 #define CONFIG_ENV_OVERWRITE 1 139 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 140 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 141 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 142 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 143 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 144 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 145 146 /* Board Clock */ 147 #if defined(CONFIG_400MHZ_MODE) 148 #define CONFIG_SYS_CLK_FREQ 50000000 149 #else 150 #define CONFIG_SYS_CLK_FREQ 44444444 151 #endif 152 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 153 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 154 #define CONFIG_SYS_TMU_CLK_DIV 4 155 156 #endif /* __R0P7734_H */ 157