1 /* 2 * Configuation settings for the Renesas Solutions r0p7734 board 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __R0P7734_H 10 #define __R0P7734_H 11 12 #define CONFIG_CPU_SH7734 1 13 #define CONFIG_R0P7734 1 14 #define CONFIG_400MHZ_MODE 1 15 16 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 17 18 #define CONFIG_DISPLAY_BOARDINFO 19 #undef CONFIG_SHOW_BOOT_PROGRESS 20 21 /* Ether */ 22 #define CONFIG_SH_ETHER 1 23 #define CONFIG_SH_ETHER_USE_PORT (0) 24 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 25 #define CONFIG_PHY_SMSC 1 26 #define CONFIG_BITBANGMII 27 #define CONFIG_BITBANGMII_MULTI 28 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ 29 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 30 31 /* undef to save memory */ 32 #define CONFIG_SYS_LONGHELP 33 /* List of legal baudrate settings for this board */ 34 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 35 36 /* SCIF */ 37 #define CONFIG_SCIF 1 38 #define CONFIG_CONS_SCIF3 1 39 40 /* Suppress display of console information at boot */ 41 42 /* SDRAM */ 43 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 44 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 45 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 46 47 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 48 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) 49 /* Enable alternate, more extensive, memory test */ 50 #undef CONFIG_SYS_ALT_MEMTEST 51 /* Scratch address used by the alternate memory test */ 52 #undef CONFIG_SYS_MEMTEST_SCRATCH 53 54 /* Enable temporary baudrate change while serial download */ 55 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 56 57 /* FLASH */ 58 #define CONFIG_FLASH_CFI_DRIVER 1 59 #define CONFIG_SYS_FLASH_CFI 60 #undef CONFIG_SYS_FLASH_QUIET_TEST 61 #define CONFIG_SYS_FLASH_EMPTY_INFO 62 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 63 #define CONFIG_SYS_MAX_FLASH_SECT 512 64 65 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 66 #define CONFIG_SYS_MAX_FLASH_BANKS 1 67 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 68 69 /* Timeout for Flash erase operations (in ms) */ 70 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 71 /* Timeout for Flash write operations (in ms) */ 72 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 73 /* Timeout for Flash set sector lock bit operations (in ms) */ 74 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 75 /* Timeout for Flash clear lock bit operations (in ms) */ 76 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 77 78 /* 79 * Use hardware flash sectors protection instead 80 * of U-Boot software protection 81 */ 82 #undef CONFIG_SYS_FLASH_PROTECTION 83 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 84 85 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 86 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 87 /* Monitor size */ 88 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 89 /* Size of DRAM reserved for malloc() use */ 90 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 91 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 92 93 /* ENV setting */ 94 #define CONFIG_ENV_OVERWRITE 1 95 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 96 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 97 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 98 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 99 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 100 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 101 102 /* Board Clock */ 103 #if defined(CONFIG_400MHZ_MODE) 104 #define CONFIG_SYS_CLK_FREQ 50000000 105 #else 106 #define CONFIG_SYS_CLK_FREQ 44444444 107 #endif 108 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 109 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 110 #define CONFIG_SYS_TMU_CLK_DIV 4 111 112 #endif /* __R0P7734_H */ 113