1 /* 2 * Configuation settings for the Renesas Solutions r0p7734 board 3 * 4 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 5 * 6 * See file CREDITS for list of people who contributed to this 7 * project. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of 12 * the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22 * MA 02111-1307 USA 23 */ 24 25 #ifndef __R0P7734_H 26 #define __R0P7734_H 27 28 #undef DEBUG 29 #define CONFIG_SH 1 30 #define CONFIG_SH4 1 31 #define CONFIG_SH4A 1 32 #define CONFIG_CPU_SH7734 1 33 #define CONFIG_R0P7734 1 34 #define CONFIG_400MHZ_MODE 1 35 /* #define CONFIG_533MHZ_MODE 1 */ 36 37 #define CONFIG_BOARD_LATE_INIT 38 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 39 40 #define CONFIG_CMD_FLASH 41 #define CONFIG_CMD_MEMORY 42 #define CONFIG_CMD_NET 43 #define CONFIG_CMD_PING 44 #define CONFIG_CMD_MII 45 #define CONFIG_CMD_NFS 46 #define CONFIG_CMD_SDRAM 47 #define CONFIG_CMD_ENV 48 #define CONFIG_CMD_SAVEENV 49 50 #define CONFIG_BAUDRATE 115200 51 #define CONFIG_BOOTDELAY 3 52 #define CONFIG_BOOTARGS "console=ttySC3,115200" 53 54 #define CONFIG_VERSION_VARIABLE 55 #undef CONFIG_SHOW_BOOT_PROGRESS 56 57 /* Ether */ 58 #define CONFIG_SH_ETHER 1 59 #define CONFIG_SH_ETHER_USE_PORT (0) 60 #define CONFIG_SH_ETHER_PHY_ADDR (0x0) 61 #define CONFIG_PHYLIB 62 #define CONFIG_PHY_SMSC 1 63 #define CONFIG_BITBANGMII 64 #define CONFIG_BITBANGMII_MULTI 65 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ 66 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 67 #ifndef CONFIG_SH_ETHER 68 # define CONFIG_SMC911X 69 # define CONFIG_SMC911X_16_BIT 70 # define CONFIG_SMC911X_BASE (0x84000000) 71 #endif 72 73 74 /* I2C */ 75 #define CONFIG_CMD_I2C 76 #define CONFIG_SH_SH7734_I2C 1 77 #define CONFIG_HARD_I2C 1 78 #define CONFIG_I2C_MULTI_BUS 1 79 #define CONFIG_SYS_MAX_I2C_BUS 2 80 #define CONFIG_SYS_I2C_MODULE 0 81 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ 82 #define CONFIG_SYS_I2C_SLAVE 0x50 83 #define CONFIG_SH_I2C_DATA_HIGH 4 84 #define CONFIG_SH_I2C_DATA_LOW 5 85 #define CONFIG_SH_I2C_CLOCK 500000000 86 #define CONFIG_SH_I2C_BASE0 0xFFC70000 87 #define CONFIG_SH_I2C_BASE1 0xFFC7100 88 89 /* undef to save memory */ 90 #define CONFIG_SYS_LONGHELP 91 /* Monitor Command Prompt */ 92 #define CONFIG_SYS_PROMPT "=> " 93 /* Buffer size for input from the Console */ 94 #define CONFIG_SYS_CBSIZE 256 95 /* Buffer size for Console output */ 96 #define CONFIG_SYS_PBSIZE 256 97 /* max args accepted for monitor commands */ 98 #define CONFIG_SYS_MAXARGS 16 99 /* Buffer size for Boot Arguments passed to kernel */ 100 #define CONFIG_SYS_BARGSIZE 512 101 /* List of legal baudrate settings for this board */ 102 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 103 104 /* SCIF */ 105 #define CONFIG_SCIF_CONSOLE 1 106 #define CONFIG_SCIF 1 107 #define CONFIG_CONS_SCIF3 1 108 109 /* Suppress display of console information at boot */ 110 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 111 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 112 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 113 114 /* SDRAM */ 115 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 116 #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) 117 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 118 119 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 120 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) 121 /* Enable alternate, more extensive, memory test */ 122 #undef CONFIG_SYS_ALT_MEMTEST 123 /* Scratch address used by the alternate memory test */ 124 #undef CONFIG_SYS_MEMTEST_SCRATCH 125 126 /* Enable temporary baudrate change while serial download */ 127 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 128 129 /* FLASH */ 130 #define CONFIG_FLASH_CFI_DRIVER 1 131 #define CONFIG_SYS_FLASH_CFI 132 #undef CONFIG_SYS_FLASH_QUIET_TEST 133 #define CONFIG_SYS_FLASH_EMPTY_INFO 134 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 135 #define CONFIG_SYS_MAX_FLASH_SECT 512 136 137 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 138 #define CONFIG_SYS_MAX_FLASH_BANKS 1 139 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 140 141 /* Timeout for Flash erase operations (in ms) */ 142 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 143 /* Timeout for Flash write operations (in ms) */ 144 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 145 /* Timeout for Flash set sector lock bit operations (in ms) */ 146 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 147 /* Timeout for Flash clear lock bit operations (in ms) */ 148 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 149 150 /* 151 * Use hardware flash sectors protection instead 152 * of U-Boot software protection 153 */ 154 #undef CONFIG_SYS_FLASH_PROTECTION 155 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 156 157 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 158 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 159 /* Monitor size */ 160 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 161 /* Size of DRAM reserved for malloc() use */ 162 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 163 /* size in bytes reserved for initial data */ 164 #define CONFIG_SYS_GBL_DATA_SIZE (256) 165 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 166 167 /* ENV setting */ 168 #define CONFIG_ENV_IS_IN_FLASH 169 #define CONFIG_ENV_OVERWRITE 1 170 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 171 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 172 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 173 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 174 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 175 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 176 177 /* Board Clock */ 178 #if defined(CONFIG_400MHZ_MODE) 179 #define CONFIG_SYS_CLK_FREQ 50000000 180 #else 181 #define CONFIG_SYS_CLK_FREQ 44444444 182 #endif 183 #define CONFIG_SYS_TMU_CLK_DIV 4 184 #define CONFIG_SYS_HZ 1000 185 186 #endif /* __R0P7734_H */ 187