xref: /openbmc/u-boot/include/configs/r0p7734.h (revision 089df18b)
1 /*
2  * Configuation settings for the Renesas Solutions r0p7734 board
3  *
4  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __R0P7734_H
10 #define __R0P7734_H
11 
12 #define CONFIG_CPU_SH7734	1
13 #define CONFIG_R0P7734		1
14 #define CONFIG_400MHZ_MODE	1
15 /* #define CONFIG_533MHZ_MODE	1 */
16 
17 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000
18 
19 #define CONFIG_CMD_SDRAM
20 #define CONFIG_CMD_ENV
21 
22 #define CONFIG_BOOTARGS		"console=ttySC3,115200"
23 
24 #define CONFIG_DISPLAY_BOARDINFO
25 #undef  CONFIG_SHOW_BOOT_PROGRESS
26 
27 /* Ether */
28 #define CONFIG_SH_ETHER 1
29 #define CONFIG_SH_ETHER_USE_PORT (0)
30 #define CONFIG_SH_ETHER_PHY_ADDR (0x0)
31 #define CONFIG_PHYLIB
32 #define CONFIG_PHY_SMSC 1
33 #define CONFIG_BITBANGMII
34 #define CONFIG_BITBANGMII_MULTI
35 #define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
36 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
37 #ifndef CONFIG_SH_ETHER
38 # define CONFIG_SMC911X
39 # define CONFIG_SMC911X_16_BIT
40 # define CONFIG_SMC911X_BASE (0x84000000)
41 #endif
42 
43 /* undef to save memory	*/
44 #define CONFIG_SYS_LONGHELP
45 /* Monitor Command Prompt */
46 /* Buffer size for input from the Console */
47 #define CONFIG_SYS_CBSIZE		256
48 /* Buffer size for Console output */
49 #define CONFIG_SYS_PBSIZE		256
50 /* max args accepted for monitor commands */
51 #define CONFIG_SYS_MAXARGS		16
52 /* Buffer size for Boot Arguments passed to kernel */
53 #define CONFIG_SYS_BARGSIZE	512
54 /* List of legal baudrate settings for this board */
55 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
56 
57 /* SCIF */
58 #define CONFIG_SCIF_CONSOLE	1
59 #define CONFIG_SCIF			1
60 #define CONFIG_CONS_SCIF3	1
61 
62 /* Suppress display of console information at boot */
63 
64 /* SDRAM */
65 #define CONFIG_SYS_SDRAM_BASE	(0x88000000)
66 #define CONFIG_SYS_SDRAM_SIZE	(128 * 1024 * 1024)
67 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
68 
69 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
70 #define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
71 /* Enable alternate, more extensive, memory test */
72 #undef  CONFIG_SYS_ALT_MEMTEST
73 /* Scratch address used by the alternate memory test */
74 #undef  CONFIG_SYS_MEMTEST_SCRATCH
75 
76 /* Enable temporary baudrate change while serial download */
77 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
78 
79 /* FLASH */
80 #define CONFIG_FLASH_CFI_DRIVER 1
81 #define CONFIG_SYS_FLASH_CFI
82 #undef  CONFIG_SYS_FLASH_QUIET_TEST
83 #define CONFIG_SYS_FLASH_EMPTY_INFO
84 #define CONFIG_SYS_FLASH_BASE	(0xA0000000)
85 #define CONFIG_SYS_MAX_FLASH_SECT	512
86 
87 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
88 #define CONFIG_SYS_MAX_FLASH_BANKS	1
89 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
90 
91 /* Timeout for Flash erase operations (in ms) */
92 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
93 /* Timeout for Flash write operations (in ms) */
94 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
95 /* Timeout for Flash set sector lock bit operations (in ms) */
96 #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
97 /* Timeout for Flash clear lock bit operations (in ms) */
98 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
99 
100 /*
101  * Use hardware flash sectors protection instead
102  * of U-Boot software protection
103  */
104 #undef  CONFIG_SYS_FLASH_PROTECTION
105 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
106 
107 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
108 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
109 /* Monitor size */
110 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
111 /* Size of DRAM reserved for malloc() use */
112 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
113 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
114 
115 /* ENV setting */
116 #define CONFIG_ENV_IS_IN_FLASH
117 #define CONFIG_ENV_OVERWRITE	1
118 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
119 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
120 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
121 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
122 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
123 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
124 
125 /* Board Clock */
126 #if defined(CONFIG_400MHZ_MODE)
127 #define CONFIG_SYS_CLK_FREQ 50000000
128 #else
129 #define CONFIG_SYS_CLK_FREQ 44444444
130 #endif
131 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
132 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
133 #define CONFIG_SYS_TMU_CLK_DIV      4
134 
135 #endif	/* __R0P7734_H */
136