1a65b25d1SBin Meng /* 2a65b25d1SBin Meng * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 3a65b25d1SBin Meng * 4a65b25d1SBin Meng * SPDX-License-Identifier: GPL-2.0+ 5a65b25d1SBin Meng */ 6a65b25d1SBin Meng 7a65b25d1SBin Meng /* 8a65b25d1SBin Meng * board/config.h - configuration options, board specific 9a65b25d1SBin Meng */ 10a65b25d1SBin Meng 11a65b25d1SBin Meng #ifndef __CONFIG_H 12a65b25d1SBin Meng #define __CONFIG_H 13a65b25d1SBin Meng 14a65b25d1SBin Meng #include <configs/x86-common.h> 15a65b25d1SBin Meng 16a65b25d1SBin Meng #define CONFIG_SYS_MONITOR_LEN (1 << 20) 175c564226SBin Meng #define CONFIG_ARCH_MISC_INIT 18*48748595SBin Meng #define CONFIG_ARCH_EARLY_INIT_R 19a65b25d1SBin Meng 20a65b25d1SBin Meng #define CONFIG_PCI_MEM_BUS 0xc0000000 21a65b25d1SBin Meng #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS 22a65b25d1SBin Meng #define CONFIG_PCI_MEM_SIZE 0x10000000 23a65b25d1SBin Meng 24a65b25d1SBin Meng #define CONFIG_PCI_PREF_BUS 0xd0000000 25a65b25d1SBin Meng #define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS 26a65b25d1SBin Meng #define CONFIG_PCI_PREF_SIZE 0x10000000 27a65b25d1SBin Meng 28a65b25d1SBin Meng #define CONFIG_PCI_IO_BUS 0x2000 29a65b25d1SBin Meng #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS 30a65b25d1SBin Meng #define CONFIG_PCI_IO_SIZE 0xe000 31a65b25d1SBin Meng 32*48748595SBin Meng #define CONFIG_SYS_EARLY_PCI_INIT 33a65b25d1SBin Meng #define CONFIG_PCI_PNP 34a65b25d1SBin Meng 359c4f5412SBin Meng #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,vga\0" \ 369c4f5412SBin Meng "stdout=serial,vga\0" \ 379c4f5412SBin Meng "stderr=serial,vga\0" 38a65b25d1SBin Meng 392aa3a7fbSBin Meng /* 402aa3a7fbSBin Meng * ATA/SATA support for QEMU x86 targets 412aa3a7fbSBin Meng * - Only legacy IDE controller is supported for QEMU '-M pc' target 422aa3a7fbSBin Meng * - AHCI controller is supported for QEMU '-M q35' target 432aa3a7fbSBin Meng * 442aa3a7fbSBin Meng * Default configuraion is to support the QEMU default x86 target 452aa3a7fbSBin Meng * Undefine CONFIG_CMD_IDE to support q35 target 462aa3a7fbSBin Meng */ 472aa3a7fbSBin Meng #define CONFIG_CMD_IDE 482aa3a7fbSBin Meng #ifdef CONFIG_CMD_IDE 492aa3a7fbSBin Meng #define CONFIG_SYS_IDE_MAXBUS 2 502aa3a7fbSBin Meng #define CONFIG_SYS_IDE_MAXDEVICE 4 512aa3a7fbSBin Meng #define CONFIG_SYS_ATA_BASE_ADDR 0 522aa3a7fbSBin Meng #define CONFIG_SYS_ATA_DATA_OFFSET 0 532aa3a7fbSBin Meng #define CONFIG_SYS_ATA_REG_OFFSET 0 542aa3a7fbSBin Meng #define CONFIG_SYS_ATA_ALT_OFFSET 0 552aa3a7fbSBin Meng #define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 562aa3a7fbSBin Meng #define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 572aa3a7fbSBin Meng #define CONFIG_ATAPI 582aa3a7fbSBin Meng 592aa3a7fbSBin Meng #undef CONFIG_SCSI_AHCI 602aa3a7fbSBin Meng #undef CONFIG_CMD_SCSI 612aa3a7fbSBin Meng #else 62a65b25d1SBin Meng #define CONFIG_SCSI_DEV_LIST \ 632aa3a7fbSBin Meng {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI} 642aa3a7fbSBin Meng #endif 65a65b25d1SBin Meng 66a65b25d1SBin Meng /* GPIO is not supported */ 67a65b25d1SBin Meng #undef CONFIG_INTEL_ICH6_GPIO 68a65b25d1SBin Meng #undef CONFIG_CMD_GPIO 69a65b25d1SBin Meng 70a65b25d1SBin Meng /* SPI is not supported */ 71a65b25d1SBin Meng #undef CONFIG_ICH_SPI 72a65b25d1SBin Meng #undef CONFIG_ENV_IS_IN_SPI_FLASH 73a65b25d1SBin Meng #define CONFIG_ENV_IS_NOWHERE 74a65b25d1SBin Meng 75a65b25d1SBin Meng #endif /* __CONFIG_H */ 76