1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2a65b25d1SBin Meng /* 3a65b25d1SBin Meng * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 4a65b25d1SBin Meng */ 5a65b25d1SBin Meng 6a65b25d1SBin Meng /* 7a65b25d1SBin Meng * board/config.h - configuration options, board specific 8a65b25d1SBin Meng */ 9a65b25d1SBin Meng 10a65b25d1SBin Meng #ifndef __CONFIG_H 11a65b25d1SBin Meng #define __CONFIG_H 12a65b25d1SBin Meng 13a65b25d1SBin Meng #include <configs/x86-common.h> 14a65b25d1SBin Meng 15a65b25d1SBin Meng #define CONFIG_SYS_MONITOR_LEN (1 << 20) 16a65b25d1SBin Meng 17b6ff6ce6SBin Meng #define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \ 18fcda8c38SBin Meng "stdout=serial,vidconsole\0" \ 19fcda8c38SBin Meng "stderr=serial,vidconsole\0" 20a65b25d1SBin Meng 212aa3a7fbSBin Meng /* 222aa3a7fbSBin Meng * ATA/SATA support for QEMU x86 targets 232aa3a7fbSBin Meng * - Only legacy IDE controller is supported for QEMU '-M pc' target 242aa3a7fbSBin Meng * - AHCI controller is supported for QEMU '-M q35' target 252aa3a7fbSBin Meng */ 262aa3a7fbSBin Meng #define CONFIG_SYS_IDE_MAXBUS 2 272aa3a7fbSBin Meng #define CONFIG_SYS_IDE_MAXDEVICE 4 282aa3a7fbSBin Meng #define CONFIG_SYS_ATA_BASE_ADDR 0 292aa3a7fbSBin Meng #define CONFIG_SYS_ATA_DATA_OFFSET 0 302aa3a7fbSBin Meng #define CONFIG_SYS_ATA_REG_OFFSET 0 312aa3a7fbSBin Meng #define CONFIG_SYS_ATA_ALT_OFFSET 0 322aa3a7fbSBin Meng #define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 332aa3a7fbSBin Meng #define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 342aa3a7fbSBin Meng #define CONFIG_ATAPI 352aa3a7fbSBin Meng 36a65b25d1SBin Meng /* SPI is not supported */ 37a65b25d1SBin Meng 3873d2de2bSBin Meng #define CONFIG_SPL_TEXT_BASE 0xfffd0000 3973d2de2bSBin Meng 4073d2de2bSBin Meng #define BOOT_DEVICE_SPI 10 4173d2de2bSBin Meng 4273d2de2bSBin Meng #define CONFIG_SPL_BOARD_LOAD_IMAGE 4373d2de2bSBin Meng #define BOOT_DEVICE_BOARD 11 4473d2de2bSBin Meng 45a65b25d1SBin Meng #endif /* __CONFIG_H */ 46