1 /* 2 * Copyright 2011-2014 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 /* 8 * Corenet DS style board configuration file 9 */ 10 #ifndef __QEMU_PPCE500_H 11 #define __QEMU_PPCE500_H 12 13 #define CONFIG_CMD_REGINFO 14 15 /* High Level Configuration Options */ 16 #define CONFIG_BOOKE 17 #define CONFIG_E500 /* BOOKE e500 family */ 18 #define CONFIG_QEMU_E500 19 20 #undef CONFIG_SYS_TEXT_BASE 21 #define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */ 22 #define CONFIG_SYS_GENERIC_BOARD 23 24 #define CONFIG_SYS_MPC85XX_NO_RESETVEC 25 26 #define CONFIG_SYS_RAMBOOT 27 28 #define CONFIG_PCI /* Enable PCI/PCIE */ 29 #define CONFIG_PCI1 1 /* PCI controller 1 */ 30 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ 31 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ 32 33 #define CONFIG_ENV_OVERWRITE 34 35 #define CONFIG_ENABLE_36BIT_PHYS 36 37 #define CONFIG_ADDR_MAP 38 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ 39 40 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ 41 #define CONFIG_SYS_MEMTEST_END 0x00400000 42 #define CONFIG_SYS_ALT_MEMTEST 43 #define CONFIG_PANIC_HANG /* do not reset board on panic */ 44 45 /* Needed to fill the ccsrbar pointer */ 46 #define CONFIG_BOARD_EARLY_INIT_F 47 48 /* Virtual address to CCSRBAR */ 49 #define CONFIG_SYS_CCSRBAR 0xe0000000 50 /* Physical address should be a function call */ 51 #ifndef __ASSEMBLY__ 52 extern unsigned long long get_phys_ccsrbar_addr_early(void); 53 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32) 54 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() 55 #else 56 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 57 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 58 #endif 59 60 #define CONFIG_PHYS_64BIT 61 62 /* Virtual address range for PCI region maps */ 63 #define CONFIG_SYS_PCI_MAP_START 0x80000000 64 #define CONFIG_SYS_PCI_MAP_END 0xe8000000 65 66 /* Virtual address to a temporary map if we need it (max 128MB) */ 67 #define CONFIG_SYS_TMPVIRT 0xe8000000 68 69 /* 70 * DDR Setup 71 */ 72 #define CONFIG_VERY_BIG_RAM 73 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 74 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 75 76 #define CONFIG_CHIP_SELECTS_PER_CTRL 0 77 78 #define CONFIG_SYS_CLK_FREQ 33000000 79 80 #define CONFIG_SYS_NO_FLASH 81 82 #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ 83 84 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 85 86 #define CONFIG_ENV_IS_NOWHERE 87 88 #define CONFIG_HWCONFIG 89 90 #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000 91 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0 92 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000 93 /* The assembler doesn't like typecast */ 94 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ 95 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ 96 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) 97 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 98 99 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 100 GENERATED_GBL_DATA_SIZE) 101 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 102 103 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 104 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 105 106 #define CONFIG_CONS_INDEX 1 107 #define CONFIG_SYS_NS16550 108 #define CONFIG_SYS_NS16550_SERIAL 109 #define CONFIG_SYS_NS16550_REG_SIZE 1 110 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)) 111 112 #define CONFIG_SYS_BAUDRATE_TABLE \ 113 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} 114 115 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) 116 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) 117 118 /* Use the HUSH parser */ 119 #define CONFIG_SYS_HUSH_PARSER 120 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 121 122 /* pass open firmware flat tree */ 123 #define CONFIG_OF_LIBFDT 124 #define CONFIG_OF_BOARD_SETUP 125 #define CONFIG_OF_STDOUT_VIA_ALIAS 126 127 /* new uImage format support */ 128 #define CONFIG_FIT 129 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */ 130 131 /* 132 * General PCI 133 * Memory space is mapped 1-1, but I/O space must start from 0. 134 */ 135 136 #ifdef CONFIG_PCI 137 #define CONFIG_PCI_INDIRECT_BRIDGE 138 #define CONFIG_PCI_PNP /* do pci plug-and-play */ 139 140 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 141 #define CONFIG_DOS_PARTITION 142 #endif /* CONFIG_PCI */ 143 144 #define CONFIG_LBA48 145 #define CONFIG_DOS_PARTITION 146 #define CONFIG_CMD_EXT2 147 148 /* 149 * Environment 150 */ 151 #define CONFIG_ENV_SIZE 0x2000 152 153 #define CONFIG_LOADS_ECHO /* echo on for serial download */ 154 155 #define CONFIG_LAST_STAGE_INIT 156 157 /* 158 * Command line configuration. 159 */ 160 #define CONFIG_CMD_DHCP 161 #define CONFIG_CMD_BOOTZ 162 #define CONFIG_CMD_GREPENV 163 #define CONFIG_CMD_IRQ 164 #define CONFIG_CMD_PING 165 166 #ifdef CONFIG_PCI 167 #define CONFIG_CMD_PCI 168 #endif 169 170 /* 171 * Miscellaneous configurable options 172 */ 173 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 174 #define CONFIG_CMDLINE_EDITING /* Command-line editing */ 175 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ 176 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 177 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 178 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 179 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 180 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ 181 182 /* 183 * For booting Linux, the board info and command line data 184 * have to be in the first 64 MB of memory, since this is 185 * the maximum mapped by the Linux kernel during initialization. 186 */ 187 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ 188 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 189 190 /* 191 * Environment Configuration 192 */ 193 #define CONFIG_ROOTPATH "/opt/nfsroot" 194 #define CONFIG_BOOTFILE "uImage" 195 #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ 196 197 /* default location for tftp and bootm */ 198 #define CONFIG_LOADADDR 1000000 199 200 #define CONFIG_BAUDRATE 115200 201 202 #define CONFIG_BOOTDELAY 1 203 #define CONFIG_BOOTCOMMAND \ 204 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0" 205 206 #endif /* __QEMU_PPCE500_H */ 207