1 /*
2  * Copyright 2011-2014 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 /*
8  * Corenet DS style board configuration file
9  */
10 #ifndef __QEMU_PPCE500_H
11 #define __QEMU_PPCE500_H
12 
13 #define CONFIG_CMD_REGINFO
14 
15 #undef CONFIG_SYS_TEXT_BASE
16 #define CONFIG_SYS_TEXT_BASE	0xf01000 /* 15 MB */
17 
18 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
19 
20 #define CONFIG_SYS_RAMBOOT
21 
22 #define CONFIG_PCI1		1	/* PCI controller 1 */
23 #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
24 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
25 
26 #define CONFIG_ENV_OVERWRITE
27 
28 #define CONFIG_ENABLE_36BIT_PHYS
29 
30 #define CONFIG_ADDR_MAP
31 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
32 
33 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
34 #define CONFIG_SYS_MEMTEST_END		0x00400000
35 #define CONFIG_SYS_ALT_MEMTEST
36 #define CONFIG_PANIC_HANG	/* do not reset board on panic */
37 
38 /* Needed to fill the ccsrbar pointer */
39 
40 /* Virtual address to CCSRBAR */
41 #define CONFIG_SYS_CCSRBAR		0xe0000000
42 /* Physical address should be a function call */
43 #ifndef __ASSEMBLY__
44 extern unsigned long long get_phys_ccsrbar_addr_early(void);
45 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
46 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
47 #else
48 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
49 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
50 #endif
51 
52 /* Virtual address range for PCI region maps */
53 #define CONFIG_SYS_PCI_MAP_START	0x80000000
54 #define CONFIG_SYS_PCI_MAP_END		0xe8000000
55 
56 /* Virtual address to a temporary map if we need it (max 128MB) */
57 #define CONFIG_SYS_TMPVIRT		0xe8000000
58 
59 /*
60  * DDR Setup
61  */
62 #define CONFIG_VERY_BIG_RAM
63 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
64 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
65 
66 #define CONFIG_CHIP_SELECTS_PER_CTRL	0
67 
68 #define CONFIG_SYS_CLK_FREQ        33000000
69 
70 #define CONFIG_SYS_NO_FLASH
71 
72 #define CONFIG_SYS_BOOT_BLOCK		0x00000000	/* boot TLB */
73 
74 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
75 
76 #define CONFIG_ENV_IS_NOWHERE
77 
78 #define CONFIG_HWCONFIG
79 
80 #define CONFIG_SYS_INIT_RAM_ADDR		0x00100000
81 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	0x0
82 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	0x00100000
83 /* The assembler doesn't like typecast */
84 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
85 	((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
86 	  CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
87 #define CONFIG_SYS_INIT_RAM_SIZE		0x00004000
88 
89 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
90 					GENERATED_GBL_DATA_SIZE)
91 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
92 
93 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
94 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
95 
96 #define CONFIG_CONS_INDEX	1
97 #define CONFIG_SYS_NS16550_SERIAL
98 #define CONFIG_SYS_NS16550_REG_SIZE	1
99 #define CONFIG_SYS_NS16550_CLK		(get_bus_freq(0))
100 
101 #define CONFIG_SYS_BAUDRATE_TABLE	\
102 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
103 
104 #define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_CCSRBAR+0x4500)
105 #define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR+0x4600)
106 
107 /*
108  * General PCI
109  * Memory space is mapped 1-1, but I/O space must start from 0.
110  */
111 
112 #ifdef CONFIG_PCI
113 #define CONFIG_PCI_INDIRECT_BRIDGE
114 
115 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
116 #endif	/* CONFIG_PCI */
117 
118 #define CONFIG_LBA48
119 
120 /*
121  * Environment
122  */
123 #define CONFIG_ENV_SIZE		0x2000
124 
125 #define CONFIG_LOADS_ECHO		/* echo on for serial download */
126 
127 #define CONFIG_LAST_STAGE_INIT
128 
129 /*
130  * Command line configuration.
131  */
132 #define CONFIG_CMD_IRQ
133 
134 #ifdef CONFIG_PCI
135 #define CONFIG_CMD_PCI
136 #endif
137 
138 /*
139  * Miscellaneous configurable options
140  */
141 #define CONFIG_SYS_LONGHELP			/* undef to save memory	*/
142 #define CONFIG_CMDLINE_EDITING			/* Command-line editing */
143 #define CONFIG_AUTO_COMPLETE			/* add autocompletion support */
144 #define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
145 #define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size */
146 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
147 #define CONFIG_SYS_MAXARGS	16		/* max number of command args */
148 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
149 
150 /*
151  * For booting Linux, the board info and command line data
152  * have to be in the first 64 MB of memory, since this is
153  * the maximum mapped by the Linux kernel during initialization.
154  */
155 #define CONFIG_SYS_BOOTMAPSZ	(64 << 20)	/* Initial map for Linux*/
156 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* Increase max gunzip size */
157 
158 /*
159  * Environment Configuration
160  */
161 #define CONFIG_ROOTPATH		"/opt/nfsroot"
162 #define CONFIG_BOOTFILE		"uImage"
163 #define CONFIG_UBOOTPATH	"u-boot.bin"	/* U-Boot image on TFTP server*/
164 
165 /* default location for tftp and bootm */
166 #define CONFIG_LOADADDR		1000000
167 
168 #define CONFIG_BAUDRATE	115200
169 
170 #define CONFIG_BOOTCOMMAND		\
171 	"test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
172 
173 #endif	/* __QEMU_PPCE500_H */
174