1 /*
2  * Copyright 2011-2014 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 /*
8  * Corenet DS style board configuration file
9  */
10 #ifndef __QEMU_PPCE500_H
11 #define __QEMU_PPCE500_H
12 
13 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
14 
15 #define CONFIG_SYS_RAMBOOT
16 
17 #define CONFIG_PCI1		1	/* PCI controller 1 */
18 #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
19 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
20 
21 #define CONFIG_ENV_OVERWRITE
22 
23 #define CONFIG_ENABLE_36BIT_PHYS
24 
25 #define CONFIG_ADDR_MAP
26 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
27 
28 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
29 #define CONFIG_SYS_MEMTEST_END		0x00400000
30 #define CONFIG_SYS_ALT_MEMTEST
31 
32 /* Needed to fill the ccsrbar pointer */
33 
34 /* Virtual address to CCSRBAR */
35 #define CONFIG_SYS_CCSRBAR		0xe0000000
36 /* Physical address should be a function call */
37 #ifndef __ASSEMBLY__
38 extern unsigned long long get_phys_ccsrbar_addr_early(void);
39 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32)
40 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early()
41 #else
42 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0
43 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
44 #endif
45 
46 /* Virtual address range for PCI region maps */
47 #define CONFIG_SYS_PCI_MAP_START	0x80000000
48 #define CONFIG_SYS_PCI_MAP_END		0xe8000000
49 
50 /* Virtual address to a temporary map if we need it (max 128MB) */
51 #define CONFIG_SYS_TMPVIRT		0xe8000000
52 
53 /*
54  * DDR Setup
55  */
56 #define CONFIG_VERY_BIG_RAM
57 #define CONFIG_SYS_DDR_SDRAM_BASE	0x00000000
58 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
59 
60 #define CONFIG_CHIP_SELECTS_PER_CTRL	0
61 
62 #define CONFIG_SYS_CLK_FREQ        33000000
63 
64 #define CONFIG_SYS_BOOT_BLOCK		0x00000000	/* boot TLB */
65 
66 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
67 
68 #define CONFIG_HWCONFIG
69 
70 #define CONFIG_SYS_INIT_RAM_ADDR		0x00100000
71 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH	0x0
72 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW	0x00100000
73 /* The assembler doesn't like typecast */
74 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \
75 	((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \
76 	  CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW)
77 #define CONFIG_SYS_INIT_RAM_SIZE		0x00004000
78 
79 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
80 					GENERATED_GBL_DATA_SIZE)
81 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
82 
83 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
84 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
85 
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE	1
88 #define CONFIG_SYS_NS16550_CLK		(get_bus_freq(0))
89 
90 #define CONFIG_SYS_BAUDRATE_TABLE	\
91 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
92 
93 #define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_CCSRBAR+0x4500)
94 #define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR+0x4600)
95 
96 /*
97  * General PCI
98  * Memory space is mapped 1-1, but I/O space must start from 0.
99  */
100 
101 #ifdef CONFIG_PCI
102 #define CONFIG_PCI_INDIRECT_BRIDGE
103 
104 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
105 #endif	/* CONFIG_PCI */
106 
107 #define CONFIG_LBA48
108 
109 /*
110  * Environment
111  */
112 #define CONFIG_ENV_SIZE		0x2000
113 
114 #define CONFIG_LOADS_ECHO		/* echo on for serial download */
115 
116 #define CONFIG_LAST_STAGE_INIT
117 
118 /*
119  * Command line configuration.
120  */
121 
122 /*
123  * Miscellaneous configurable options
124  */
125 #define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
126 
127 /*
128  * For booting Linux, the board info and command line data
129  * have to be in the first 64 MB of memory, since this is
130  * the maximum mapped by the Linux kernel during initialization.
131  */
132 #define CONFIG_SYS_BOOTMAPSZ	(64 << 20)	/* Initial map for Linux*/
133 #define CONFIG_SYS_BOOTM_LEN	(64 << 20)	/* Increase max gunzip size */
134 
135 /*
136  * Environment Configuration
137  */
138 #define CONFIG_ROOTPATH		"/opt/nfsroot"
139 #define CONFIG_BOOTFILE		"uImage"
140 #define CONFIG_UBOOTPATH	"u-boot.bin"	/* U-Boot image on TFTP server*/
141 
142 /* default location for tftp and bootm */
143 #define CONFIG_LOADADDR		1000000
144 
145 #define CONFIG_BOOTCOMMAND		\
146 	"test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0"
147 
148 #endif	/* __QEMU_PPCE500_H */
149