1 /* 2 * Copyright 2011-2014 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 /* 8 * Corenet DS style board configuration file 9 */ 10 #ifndef __QEMU_PPCE500_H 11 #define __QEMU_PPCE500_H 12 13 #define CONFIG_CMD_REGINFO 14 15 #undef CONFIG_SYS_TEXT_BASE 16 #define CONFIG_SYS_TEXT_BASE 0xf01000 /* 15 MB */ 17 18 #define CONFIG_SYS_MPC85XX_NO_RESETVEC 19 20 #define CONFIG_SYS_RAMBOOT 21 22 #define CONFIG_PCI1 1 /* PCI controller 1 */ 23 #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ 24 #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ 25 26 #define CONFIG_ENV_OVERWRITE 27 28 #define CONFIG_ENABLE_36BIT_PHYS 29 30 #define CONFIG_ADDR_MAP 31 #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ 32 33 #define CONFIG_SYS_MEMTEST_START 0x00200000 /* memtest works on */ 34 #define CONFIG_SYS_MEMTEST_END 0x00400000 35 #define CONFIG_SYS_ALT_MEMTEST 36 #define CONFIG_PANIC_HANG /* do not reset board on panic */ 37 38 /* Needed to fill the ccsrbar pointer */ 39 #define CONFIG_BOARD_EARLY_INIT_F 40 41 /* Virtual address to CCSRBAR */ 42 #define CONFIG_SYS_CCSRBAR 0xe0000000 43 /* Physical address should be a function call */ 44 #ifndef __ASSEMBLY__ 45 extern unsigned long long get_phys_ccsrbar_addr_early(void); 46 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH (get_phys_ccsrbar_addr_early() >> 32) 47 #define CONFIG_SYS_CCSRBAR_PHYS_LOW get_phys_ccsrbar_addr_early() 48 #else 49 #define CONFIG_SYS_CCSRBAR_PHYS_HIGH 0x0 50 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR 51 #endif 52 53 /* Virtual address range for PCI region maps */ 54 #define CONFIG_SYS_PCI_MAP_START 0x80000000 55 #define CONFIG_SYS_PCI_MAP_END 0xe8000000 56 57 /* Virtual address to a temporary map if we need it (max 128MB) */ 58 #define CONFIG_SYS_TMPVIRT 0xe8000000 59 60 /* 61 * DDR Setup 62 */ 63 #define CONFIG_VERY_BIG_RAM 64 #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 65 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 66 67 #define CONFIG_CHIP_SELECTS_PER_CTRL 0 68 69 #define CONFIG_SYS_CLK_FREQ 33000000 70 71 #define CONFIG_SYS_NO_FLASH 72 73 #define CONFIG_SYS_BOOT_BLOCK 0x00000000 /* boot TLB */ 74 75 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 76 77 #define CONFIG_ENV_IS_NOWHERE 78 79 #define CONFIG_HWCONFIG 80 81 #define CONFIG_SYS_INIT_RAM_ADDR 0x00100000 82 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0x0 83 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW 0x00100000 84 /* The assembler doesn't like typecast */ 85 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ 86 ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ 87 CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) 88 #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 89 90 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 91 GENERATED_GBL_DATA_SIZE) 92 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 93 94 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 95 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 96 97 #define CONFIG_CONS_INDEX 1 98 #define CONFIG_SYS_NS16550_SERIAL 99 #define CONFIG_SYS_NS16550_REG_SIZE 1 100 #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)) 101 102 #define CONFIG_SYS_BAUDRATE_TABLE \ 103 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} 104 105 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) 106 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) 107 108 /* 109 * General PCI 110 * Memory space is mapped 1-1, but I/O space must start from 0. 111 */ 112 113 #ifdef CONFIG_PCI 114 #define CONFIG_PCI_INDIRECT_BRIDGE 115 116 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ 117 #define CONFIG_DOS_PARTITION 118 #endif /* CONFIG_PCI */ 119 120 #define CONFIG_LBA48 121 #define CONFIG_DOS_PARTITION 122 123 /* 124 * Environment 125 */ 126 #define CONFIG_ENV_SIZE 0x2000 127 128 #define CONFIG_LOADS_ECHO /* echo on for serial download */ 129 130 #define CONFIG_LAST_STAGE_INIT 131 132 /* 133 * Command line configuration. 134 */ 135 #define CONFIG_CMD_IRQ 136 137 #ifdef CONFIG_PCI 138 #define CONFIG_CMD_PCI 139 #endif 140 141 /* 142 * Miscellaneous configurable options 143 */ 144 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 145 #define CONFIG_CMDLINE_EDITING /* Command-line editing */ 146 #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ 147 #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ 148 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 149 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 150 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 151 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */ 152 153 /* 154 * For booting Linux, the board info and command line data 155 * have to be in the first 64 MB of memory, since this is 156 * the maximum mapped by the Linux kernel during initialization. 157 */ 158 #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial map for Linux*/ 159 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 160 161 /* 162 * Environment Configuration 163 */ 164 #define CONFIG_ROOTPATH "/opt/nfsroot" 165 #define CONFIG_BOOTFILE "uImage" 166 #define CONFIG_UBOOTPATH "u-boot.bin" /* U-Boot image on TFTP server*/ 167 168 /* default location for tftp and bootm */ 169 #define CONFIG_LOADADDR 1000000 170 171 #define CONFIG_BAUDRATE 115200 172 173 #define CONFIG_BOOTCOMMAND \ 174 "test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $fdt_addr_r\0" 175 176 #endif /* __QEMU_PPCE500_H */ 177