xref: /openbmc/u-boot/include/configs/qemu-mips.h (revision cd1cc31f)
1 /*
2  * (C) Copyright 2003
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 /*
9  * This file contains the configuration parameters for qemu-mips target.
10  */
11 
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14 
15 #define CONFIG_QEMU_MIPS
16 
17 #define CONFIG_MISC_INIT_R
18 
19 #define CONFIG_TIMESTAMP		/* Print image info with timestamp */
20 
21 #define CONFIG_EXTRA_ENV_SETTINGS					\
22 	"addmisc=setenv bootargs ${bootargs} "				\
23 		"console=ttyS0,${baudrate} "				\
24 		"panic=1\0"						\
25 	"bootfile=/tftpboot/vmlinux\0"				\
26 	"load=tftp 80500000 ${u-boot}\0"				\
27 	""
28 
29 #define CONFIG_BOOTCOMMAND	"bootp;bootelf"
30 
31 /*
32  * BOOTP options
33  */
34 #define CONFIG_BOOTP_BOOTFILESIZE
35 #define CONFIG_BOOTP_BOOTPATH
36 #define CONFIG_BOOTP_GATEWAY
37 #define CONFIG_BOOTP_HOSTNAME
38 
39 /*
40  * Command line configuration.
41  */
42 
43 #define CONFIG_DRIVER_NE2000
44 #define CONFIG_DRIVER_NE2000_BASE	0xb4000300
45 
46 #define CONFIG_SYS_NS16550_SERIAL
47 #define CONFIG_SYS_NS16550_REG_SIZE	1
48 #define CONFIG_SYS_NS16550_CLK		115200
49 #define CONFIG_SYS_NS16550_COM1		0xb40003f8
50 #define CONFIG_CONS_INDEX		1
51 
52 #ifdef CONFIG_SYS_BIG_ENDIAN
53 #define CONFIG_IDE_SWAP_IO
54 #endif
55 
56 #define CONFIG_SYS_IDE_MAXBUS		2
57 #define CONFIG_SYS_ATA_IDE0_OFFSET	0x1f0
58 #define CONFIG_SYS_ATA_IDE1_OFFSET	0x170
59 #define CONFIG_SYS_ATA_DATA_OFFSET	0
60 #define CONFIG_SYS_ATA_REG_OFFSET	0
61 #define CONFIG_SYS_ATA_BASE_ADDR	0xb4000000
62 
63 #define CONFIG_SYS_IDE_MAXDEVICE	4
64 
65 /*
66  * Miscellaneous configurable options
67  */
68 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
69 
70 #define CONFIG_AUTO_COMPLETE
71 #define CONFIG_CMDLINE_EDITING
72 
73 #define CONFIG_SYS_MALLOC_LEN		(256 << 10)
74 
75 #define CONFIG_SYS_BOOTPARAMS_LEN	128*1024
76 
77 #define CONFIG_SYS_MHZ			132
78 
79 #define CONFIG_SYS_MIPS_TIMER_FREQ	(CONFIG_SYS_MHZ * 1000000)
80 
81 /* Cached addr */
82 #define CONFIG_SYS_SDRAM_BASE		0x80000000
83 
84 /* default load address */
85 #define CONFIG_SYS_LOAD_ADDR		0x81000000
86 
87 #define CONFIG_SYS_MEMTEST_START	0x80100000
88 #define CONFIG_SYS_MEMTEST_END		0x80800000
89 
90 /*-----------------------------------------------------------------------
91  * FLASH and environment organization
92  */
93 /* The following #defines are needed to get flash environment right */
94 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE
95 
96 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
97 
98 /* We boot from this flash, selected with dip switch */
99 #define CONFIG_SYS_FLASH_BASE		0xbfc00000
100 #define CONFIG_SYS_MAX_FLASH_BANKS	1
101 #define CONFIG_SYS_MAX_FLASH_SECT	128
102 #define CONFIG_SYS_FLASH_CFI
103 #define CONFIG_FLASH_CFI_DRIVER
104 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
105 
106 /* Address and size of Primary Environment Sector */
107 #define CONFIG_ENV_SIZE		0x8000
108 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
109 
110 #define CONFIG_ENV_OVERWRITE	1
111 
112 #define MEM_SIZE		128
113 
114 #endif /* __CONFIG_H */
115