1 /* 2 * include/configs/porter.h 3 * This file is Porter board configuration. 4 * 5 * Copyright (C) 2015 Renesas Electronics Corporation 6 * Copyright (C) 2015 Cogent Embedded, Inc. 7 * 8 * SPDX-License-Identifier: GPL-2.0 9 */ 10 11 #ifndef __PORTER_H 12 #define __PORTER_H 13 14 #undef DEBUG 15 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Porter" 16 17 #include "rcar-gen2-common.h" 18 19 #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 20 #define STACK_AREA_SIZE 0x00100000 21 #define LOW_LEVEL_MERAM_STACK \ 22 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 23 24 /* MEMORY */ 25 #define RCAR_GEN2_SDRAM_BASE 0x40000000 26 #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 27 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (1024u * 1024 * 1024) 28 29 /* SCIF */ 30 31 /* FLASH */ 32 #define CONFIG_SPI 33 #define CONFIG_SPI_FLASH_QUAD 34 35 /* SH Ether */ 36 #define CONFIG_SH_ETHER_USE_PORT 0 37 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 38 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 39 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 40 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 41 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 42 #define CONFIG_BITBANGMII 43 #define CONFIG_BITBANGMII_MULTI 44 45 /* Board Clock */ 46 #define RMOBILE_XTAL_CLK 20000000u 47 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 48 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 49 50 #define CONFIG_SYS_TMU_CLK_DIV 4 51 52 #define CONFIG_EXTRA_ENV_SETTINGS \ 53 "fdt_high=0xffffffff\0" \ 54 "initrd_high=0xffffffff\0" 55 56 /* SPL support */ 57 #define CONFIG_SPL_TEXT_BASE 0xe6304000 58 #define CONFIG_SPL_STACK 0xe6340000 59 #define CONFIG_SPL_MAX_SIZE 0x40000 60 #define CONFIG_SPL_SPI_LOAD 61 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 62 63 #endif /* __PORTER_H */ 64