xref: /openbmc/u-boot/include/configs/pm9g45.h (revision dd80264d)
1 /*
2  * (C) Copyright 2010
3  * Ilko Iliev <iliev@ronetix.at>
4  * Asen Dimov <dimov@ronetix.at>
5  * Ronetix GmbH <www.ronetix.at>
6  *
7  * (C) Copyright 2007-2008
8  * Stelian Pop <stelian@popies.net>
9  * Lead Tech Design <www.leadtechdesign.com>
10  *
11  * Configuation settings for the PM9G45 board.
12  *
13  * See file CREDITS for list of people who contributed to this
14  * project.
15  *
16  * This program is free software; you can redistribute it and/or
17  * modify it under the terms of the GNU General Public License as
18  * published by the Free Software Foundation; either version 2 of
19  * the License, or (at your option) any later version.
20  *
21  * This program is distributed in the hope that it will be useful,
22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24  * GNU General Public License for more details.
25  *
26  * You should have received a copy of the GNU General Public License
27  * along with this program; if not, write to the Free Software
28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29  * MA 02111-1307 USA
30  */
31 
32 #ifndef __CONFIG_H
33 #define __CONFIG_H
34 
35 /*
36  * SoC must be defined first, before hardware.h is included.
37  * In this case SoC is defined in boards.cfg.
38  */
39 #include <asm/hardware.h>
40 
41 #define CONFIG_PM9G45		1	/* It's an Ronetix PM9G45 */
42 #define CONFIG_SYS_AT91_CPU_NAME	"AT91SAM9G45"
43 
44 #define MACH_TYPE_PM9G45	2672
45 #define CONFIG_MACH_TYPE	MACH_TYPE_PM9G45
46 
47 /* ARM asynchronous clock */
48 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000 /* from 12 MHz crystal */
49 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
50 #define CONFIG_SYS_HZ			1000
51 #define CONFIG_SYS_TEXT_BASE		0x73f00000
52 
53 #define CONFIG_ARCH_CPU_INIT
54 
55 #define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs */
56 #define CONFIG_SETUP_MEMORY_TAGS 1
57 #define CONFIG_INITRD_TAG	1
58 
59 #define CONFIG_SKIP_LOWLEVEL_INIT
60 #define CONFIG_BOARD_EARLY_INIT_F
61 
62 /*
63  * Hardware drivers
64  */
65 #define CONFIG_AT91_GPIO	1
66 #define CONFIG_ATMEL_USART	1
67 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
68 #define	CONFIG_USART_ID			ATMEL_ID_SYS
69 
70 #define CONFIG_SYS_USE_NANDFLASH	1
71 
72 /* LED */
73 #define CONFIG_AT91_LED
74 #define	CONFIG_RED_LED		AT91_PIO_PORTD, 31 /* this is the user1 led */
75 #define	CONFIG_GREEN_LED	AT91_PIO_PORTD, 0 /* this is the user2 led */
76 
77 #define CONFIG_BOOTDELAY	3
78 
79 /*
80  * BOOTP options
81  */
82 #define CONFIG_BOOTP_BOOTFILESIZE	1
83 #define CONFIG_BOOTP_BOOTPATH		1
84 #define CONFIG_BOOTP_GATEWAY		1
85 #define CONFIG_BOOTP_HOSTNAME		1
86 
87 /*
88  * Command line configuration.
89  */
90 #include <config_cmd_default.h>
91 #undef CONFIG_CMD_FPGA
92 #undef CONFIG_CMD_IMLS
93 
94 #define CONFIG_CMD_CACHE
95 #define CONFIG_CMD_PING		1
96 #define CONFIG_CMD_DHCP		1
97 #define CONFIG_CMD_NAND		1
98 #define CONFIG_CMD_USB		1
99 
100 #define CONFIG_CMD_JFFS2		1
101 #define CONFIG_JFFS2_CMDLINE		1
102 #define CONFIG_JFFS2_NAND		1
103 #define CONFIG_JFFS2_DEV		"nand0" /* NAND dev jffs2 lives on */
104 #define CONFIG_JFFS2_PART_OFFSET	0	/* start of jffs2 partition */
105 #define CONFIG_JFFS2_PART_SIZE		(256 * 1024 * 1024) /* partition */
106 
107 /* SDRAM */
108 #define CONFIG_NR_DRAM_BANKS		1
109 #define PHYS_SDRAM			0x70000000
110 #define PHYS_SDRAM_SIZE			0x08000000	/* 128 megs */
111 
112 /* NOR flash, not available */
113 #define CONFIG_SYS_NO_FLASH		1
114 #undef CONFIG_CMD_FLASH
115 
116 /* NAND flash */
117 #ifdef CONFIG_CMD_NAND
118 #define CONFIG_NAND_ATMEL
119 #define CONFIG_SYS_MAX_NAND_DEVICE	1
120 #define CONFIG_SYS_NAND_BASE		0x40000000
121 #define CONFIG_SYS_NAND_DBW_8		1
122 /* our ALE is AD21 */
123 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
124 /* our CLE is AD22 */
125 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
126 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIO_PORTC, 14
127 #define CONFIG_SYS_NAND_READY_PIN	AT91_PIO_PORTD, 3
128 
129 #endif
130 
131 /* Ethernet */
132 #define CONFIG_MACB			1
133 #define CONFIG_RMII			1
134 #define CONFIG_NET_RETRY_COUNT		20
135 #define CONFIG_RESET_PHY_R		1
136 
137 /* USB */
138 #define CONFIG_USB_ATMEL
139 #define CONFIG_USB_OHCI_NEW		1
140 #define CONFIG_DOS_PARTITION		1
141 #define CONFIG_SYS_USB_OHCI_CPU_INIT	1
142 #define CONFIG_SYS_USB_OHCI_REGS_BASE	0x00700000 /* _UHP_OHCI_BASE */
143 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"at91sam9g45"
144 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
145 #define CONFIG_USB_STORAGE		1
146 
147 /* board specific(not enough SRAM) */
148 #define CONFIG_AT91SAM9G45_LCD_BASE	PHYS_SDRAM + 0xE00000
149 
150 #define CONFIG_SYS_LOAD_ADDR		PHYS_SDRAM + 0x2000000 /* load addr */
151 
152 #define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
153 #define CONFIG_SYS_MEMTEST_END		CONFIG_AT91SAM9G45_LCD_BASE
154 
155 /* bootstrap + u-boot + env + linux in nandflash */
156 #define CONFIG_ENV_IS_IN_NAND		1
157 #define CONFIG_ENV_OFFSET		0x60000
158 #define CONFIG_ENV_OFFSET_REDUND	0x80000
159 #define CONFIG_ENV_SIZE			0x20000		/* 1 sector = 128 kB */
160 #define CONFIG_BOOTCOMMAND	"nand read 0x72000000 0x200000 0x200000; bootm"
161 #define CONFIG_BOOTARGS		"fbcon=rotate:3 console=tty0 " \
162 				"console=ttyS0,115200 " \
163 				"root=/dev/mtdblock4 " \
164 				"mtdparts=atmel_nand:128k(bootstrap)ro," \
165 				"256k(uboot)ro,1664k(env)," \
166 				"2M(linux)ro,-(root) rw " \
167 				"rootfstype=jffs2"
168 
169 #define CONFIG_BAUDRATE			115200
170 #define CONFIG_SYS_BAUDRATE_TABLE	{115200 , 19200, 38400, 57600, 9600 }
171 
172 #define CONFIG_SYS_PROMPT		"U-Boot> "
173 #define CONFIG_SYS_CBSIZE		256
174 #define CONFIG_SYS_MAXARGS		16
175 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
176 					sizeof(CONFIG_SYS_PROMPT) + 16)
177 #define CONFIG_SYS_LONGHELP		1
178 #define CONFIG_CMDLINE_EDITING		1
179 #define CONFIG_AUTO_COMPLETE
180 #define CONFIG_SYS_HUSH_PARSER
181 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
182 
183 /*
184  * Size of malloc() pool
185  */
186 #define CONFIG_SYS_MALLOC_LEN		ROUND(3 * CONFIG_ENV_SIZE + 128*1024,\
187 					0x1000)
188 
189 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM
190 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE + 0x1000 - \
191 				GENERATED_GBL_DATA_SIZE)
192 
193 #define CONFIG_STACKSIZE		(32*1024)	/* regular stack */
194 
195 #ifdef CONFIG_USE_IRQ
196 #error CONFIG_USE_IRQ not supported
197 #endif
198 
199 #endif
200