1 /* 2 * Configuration settings for the mini-box PICOSAM9G45 board. 3 * (C) Copyright 2015 Inter Act B.V. 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9m10g45ek.h 7 * (C) Copyright 2007-2008 8 * Stelian Pop <stelian@popies.net> 9 * Lead Tech Design <www.leadtechdesign.com> 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 #ifndef __CONFIG_H 15 #define __CONFIG_H 16 17 #include <asm/hardware.h> 18 19 #define CONFIG_SYS_TEXT_BASE 0x23f00000 20 21 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 22 23 /* ARM asynchronous clock */ 24 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 25 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 26 27 #define CONFIG_PICOSAM 28 29 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 30 #define CONFIG_SETUP_MEMORY_TAGS 31 #define CONFIG_INITRD_TAG 32 #define CONFIG_SKIP_LOWLEVEL_INIT 33 #define CONFIG_BOARD_EARLY_INIT_F 34 35 /* general purpose I/O */ 36 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 37 #define CONFIG_AT91_GPIO 38 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 39 40 /* serial console */ 41 #define CONFIG_ATMEL_USART 42 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 43 #define CONFIG_USART_ID ATMEL_ID_SYS 44 45 /* LCD */ 46 #define CONFIG_LCD 47 #define LCD_BPP LCD_COLOR8 48 #define CONFIG_LCD_LOGO 49 #undef LCD_TEST_PATTERN 50 #define CONFIG_LCD_INFO 51 #define CONFIG_LCD_INFO_BELOW_LOGO 52 #define CONFIG_SYS_WHITE_ON_BLACK 53 #define CONFIG_ATMEL_LCD 54 #define CONFIG_ATMEL_LCD_RGB565 55 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 56 /* board specific(not enough SRAM) */ 57 #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000 58 59 /* LED */ 60 #define CONFIG_AT91_LED 61 #define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */ 62 63 64 /* 65 * BOOTP options 66 */ 67 #define CONFIG_BOOTP_BOOTFILESIZE 68 #define CONFIG_BOOTP_BOOTPATH 69 #define CONFIG_BOOTP_GATEWAY 70 #define CONFIG_BOOTP_HOSTNAME 71 72 /* Enable the watchdog */ 73 #define CONFIG_AT91SAM9_WATCHDOG 74 #define CONFIG_HW_WATCHDOG 75 76 /* 77 * Command line configuration. 78 */ 79 80 /* No NOR flash */ 81 #define CONFIG_SYS_NO_FLASH 82 83 /* SDRAM */ 84 #define CONFIG_NR_DRAM_BANKS 2 85 #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */ 86 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 87 #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */ 88 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 89 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 90 91 #define CONFIG_SYS_INIT_SP_ADDR \ 92 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 93 94 /* MMC */ 95 96 #ifdef CONFIG_CMD_MMC 97 #define CONFIG_MMC 98 #define CONFIG_GENERIC_MMC 99 #define CONFIG_GENERIC_ATMEL_MCI 100 #endif 101 102 #if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC) 103 #define CONFIG_DOS_PARTITION 104 #endif 105 106 /* Ethernet */ 107 #define CONFIG_MACB 108 #define CONFIG_RMII 109 #define CONFIG_NET_RETRY_COUNT 20 110 #define CONFIG_RESET_PHY_R 111 #define CONFIG_AT91_WANTS_COMMON_PHY 112 113 /* USB */ 114 #define CONFIG_USB_EHCI 115 #define CONFIG_USB_EHCI_ATMEL 116 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 117 118 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 119 120 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 121 #define CONFIG_SYS_MEMTEST_END 0x23e00000 122 123 #ifdef CONFIG_SYS_USE_MMC 124 /* bootstrap + u-boot + env + linux in mmc */ 125 #define FAT_ENV_INTERFACE "mmc" 126 /* 127 * We don't specify the part number, if device 0 has partition table, it means 128 * the first partition; it no partition table, then take whole device as a 129 * FAT file system. 130 */ 131 #define FAT_ENV_DEVICE_AND_PART "0" 132 #define FAT_ENV_FILE "uboot.env" 133 #define CONFIG_ENV_IS_IN_FAT 134 #define CONFIG_FAT_WRITE 135 #define CONFIG_ENV_SIZE 0x4000 136 137 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ 138 "root=/dev/mmcblk0p2 rw rootwait" 139 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 140 "fatload mmc 0:1 0x22000000 zImage; " \ 141 "bootz 0x22000000 - 0x21000000" 142 #endif 143 144 #define CONFIG_BAUDRATE 115200 145 146 #define CONFIG_SYS_CBSIZE 256 147 #define CONFIG_SYS_MAXARGS 16 148 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 149 + sizeof(CONFIG_SYS_PROMPT) + 16) 150 #define CONFIG_SYS_LONGHELP 151 #define CONFIG_CMDLINE_EDITING 152 #define CONFIG_AUTO_COMPLETE 153 154 /* 155 * Size of malloc() pool 156 */ 157 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 158 159 /* Defines for SPL */ 160 #define CONFIG_SPL_FRAMEWORK 161 #define CONFIG_SPL_TEXT_BASE 0x300000 162 #define CONFIG_SPL_MAX_SIZE 0x010000 163 #define CONFIG_SPL_STACK 0x310000 164 165 #define CONFIG_SYS_MONITOR_LEN 0x80000 166 167 #ifdef CONFIG_SYS_USE_MMC 168 169 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 170 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 171 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 172 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 173 174 #define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds 175 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400 176 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200 177 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 178 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 179 180 #define CONFIG_SPL_ATMEL_SIZE 181 #define CONFIG_SYS_MASTER_CLOCK 132096000 182 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 183 #define CONFIG_SYS_MCKR 0x1301 184 #define CONFIG_SYS_MCKR_CSS 0x1302 185 186 #endif 187 #endif 188