1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuration settings for the mini-box PICOSAM9G45 board. 4 * (C) Copyright 2015 Inter Act B.V. 5 * 6 * Based on: 7 * U-Boot file: include/configs/at91sam9m10g45ek.h 8 * (C) Copyright 2007-2008 9 * Stelian Pop <stelian@popies.net> 10 * Lead Tech Design <www.leadtechdesign.com> 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/hardware.h> 17 18 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 19 20 /* ARM asynchronous clock */ 21 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 22 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 23 24 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 25 #define CONFIG_SETUP_MEMORY_TAGS 26 #define CONFIG_INITRD_TAG 27 #define CONFIG_SKIP_LOWLEVEL_INIT 28 29 /* general purpose I/O */ 30 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 31 #define CONFIG_AT91_GPIO 32 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 33 34 /* serial console */ 35 #define CONFIG_ATMEL_USART 36 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 37 #define CONFIG_USART_ID ATMEL_ID_SYS 38 39 /* LCD */ 40 #define LCD_BPP LCD_COLOR8 41 #define CONFIG_LCD_LOGO 42 #undef LCD_TEST_PATTERN 43 #define CONFIG_LCD_INFO 44 #define CONFIG_LCD_INFO_BELOW_LOGO 45 #define CONFIG_ATMEL_LCD 46 #define CONFIG_ATMEL_LCD_RGB565 47 /* board specific(not enough SRAM) */ 48 #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000 49 50 /* LED */ 51 #define CONFIG_AT91_LED 52 #define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */ 53 54 55 /* 56 * BOOTP options 57 */ 58 #define CONFIG_BOOTP_BOOTFILESIZE 59 60 /* Enable the watchdog */ 61 #define CONFIG_AT91SAM9_WATCHDOG 62 #define CONFIG_HW_WATCHDOG 63 64 /* 65 * Command line configuration. 66 */ 67 68 /* SDRAM */ 69 #define CONFIG_NR_DRAM_BANKS 2 70 #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */ 71 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 72 #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */ 73 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 74 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 75 76 #define CONFIG_SYS_INIT_SP_ADDR \ 77 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 78 79 /* MMC */ 80 81 #ifdef CONFIG_CMD_MMC 82 #define CONFIG_GENERIC_ATMEL_MCI 83 #endif 84 85 /* Ethernet */ 86 #define CONFIG_MACB 87 #define CONFIG_RMII 88 #define CONFIG_NET_RETRY_COUNT 20 89 #define CONFIG_RESET_PHY_R 90 #define CONFIG_AT91_WANTS_COMMON_PHY 91 92 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 93 94 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 95 #define CONFIG_SYS_MEMTEST_END 0x23e00000 96 97 #ifdef CONFIG_SYS_USE_MMC 98 /* bootstrap + u-boot + env + linux in mmc */ 99 #define CONFIG_ENV_SIZE 0x4000 100 101 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 102 "fatload mmc 0:1 0x22000000 zImage; " \ 103 "bootz 0x22000000 - 0x21000000" 104 #endif 105 106 /* 107 * Size of malloc() pool 108 */ 109 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 110 111 /* Defines for SPL */ 112 #define CONFIG_SPL_TEXT_BASE 0x300000 113 #define CONFIG_SPL_MAX_SIZE 0x010000 114 #define CONFIG_SPL_STACK 0x310000 115 116 #define CONFIG_SYS_MONITOR_LEN 0x80000 117 118 #ifdef CONFIG_SYS_USE_MMC 119 120 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 121 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 122 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 123 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 124 125 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 126 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 127 128 #define CONFIG_SPL_ATMEL_SIZE 129 #define CONFIG_SYS_MASTER_CLOCK 132096000 130 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 131 #define CONFIG_SYS_MCKR 0x1301 132 #define CONFIG_SYS_MCKR_CSS 0x1302 133 134 #endif 135 #endif 136