1 /* 2 * Configuration settings for the mini-box PICOSAM9G45 board. 3 * (C) Copyright 2015 Inter Act B.V. 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9m10g45ek.h 7 * (C) Copyright 2007-2008 8 * Stelian Pop <stelian@popies.net> 9 * Lead Tech Design <www.leadtechdesign.com> 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 #ifndef __CONFIG_H 15 #define __CONFIG_H 16 17 #include <asm/hardware.h> 18 19 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 20 21 /* ARM asynchronous clock */ 22 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 23 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 24 25 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 26 #define CONFIG_SETUP_MEMORY_TAGS 27 #define CONFIG_INITRD_TAG 28 #define CONFIG_SKIP_LOWLEVEL_INIT 29 30 /* general purpose I/O */ 31 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 32 #define CONFIG_AT91_GPIO 33 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 34 35 /* serial console */ 36 #define CONFIG_ATMEL_USART 37 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 38 #define CONFIG_USART_ID ATMEL_ID_SYS 39 40 /* LCD */ 41 #define LCD_BPP LCD_COLOR8 42 #define CONFIG_LCD_LOGO 43 #undef LCD_TEST_PATTERN 44 #define CONFIG_LCD_INFO 45 #define CONFIG_LCD_INFO_BELOW_LOGO 46 #define CONFIG_ATMEL_LCD 47 #define CONFIG_ATMEL_LCD_RGB565 48 /* board specific(not enough SRAM) */ 49 #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000 50 51 /* LED */ 52 #define CONFIG_AT91_LED 53 #define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */ 54 55 56 /* 57 * BOOTP options 58 */ 59 #define CONFIG_BOOTP_BOOTFILESIZE 60 61 /* Enable the watchdog */ 62 #define CONFIG_AT91SAM9_WATCHDOG 63 #define CONFIG_HW_WATCHDOG 64 65 /* 66 * Command line configuration. 67 */ 68 69 /* SDRAM */ 70 #define CONFIG_NR_DRAM_BANKS 2 71 #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */ 72 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 73 #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */ 74 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 75 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 76 77 #define CONFIG_SYS_INIT_SP_ADDR \ 78 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 79 80 /* MMC */ 81 82 #ifdef CONFIG_CMD_MMC 83 #define CONFIG_GENERIC_ATMEL_MCI 84 #endif 85 86 /* Ethernet */ 87 #define CONFIG_MACB 88 #define CONFIG_RMII 89 #define CONFIG_NET_RETRY_COUNT 20 90 #define CONFIG_RESET_PHY_R 91 #define CONFIG_AT91_WANTS_COMMON_PHY 92 93 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 94 95 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 96 #define CONFIG_SYS_MEMTEST_END 0x23e00000 97 98 #ifdef CONFIG_SYS_USE_MMC 99 /* bootstrap + u-boot + env + linux in mmc */ 100 #define CONFIG_ENV_SIZE 0x4000 101 102 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 103 "fatload mmc 0:1 0x22000000 zImage; " \ 104 "bootz 0x22000000 - 0x21000000" 105 #endif 106 107 /* 108 * Size of malloc() pool 109 */ 110 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 111 112 /* Defines for SPL */ 113 #define CONFIG_SPL_TEXT_BASE 0x300000 114 #define CONFIG_SPL_MAX_SIZE 0x010000 115 #define CONFIG_SPL_STACK 0x310000 116 117 #define CONFIG_SYS_MONITOR_LEN 0x80000 118 119 #ifdef CONFIG_SYS_USE_MMC 120 121 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 122 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 123 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 124 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 125 126 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 127 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 128 129 #define CONFIG_SPL_ATMEL_SIZE 130 #define CONFIG_SYS_MASTER_CLOCK 132096000 131 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 132 #define CONFIG_SYS_MCKR 0x1301 133 #define CONFIG_SYS_MCKR_CSS 0x1302 134 135 #endif 136 #endif 137