1 /* 2 * Configuration settings for the mini-box PICOSAM9G45 board. 3 * (C) Copyright 2015 Inter Act B.V. 4 * 5 * Based on: 6 * U-Boot file: include/configs/at91sam9m10g45ek.h 7 * (C) Copyright 2007-2008 8 * Stelian Pop <stelian@popies.net> 9 * Lead Tech Design <www.leadtechdesign.com> 10 * 11 * SPDX-License-Identifier: GPL-2.0+ 12 */ 13 14 #ifndef __CONFIG_H 15 #define __CONFIG_H 16 17 #include <asm/hardware.h> 18 19 #define CONFIG_SYS_TEXT_BASE 0x23f00000 20 21 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 22 23 /* ARM asynchronous clock */ 24 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 25 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 26 27 #define CONFIG_PICOSAM 28 29 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 30 #define CONFIG_SETUP_MEMORY_TAGS 31 #define CONFIG_INITRD_TAG 32 #define CONFIG_SKIP_LOWLEVEL_INIT 33 34 /* general purpose I/O */ 35 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 36 #define CONFIG_AT91_GPIO 37 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 38 39 /* serial console */ 40 #define CONFIG_ATMEL_USART 41 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 42 #define CONFIG_USART_ID ATMEL_ID_SYS 43 44 /* LCD */ 45 #define LCD_BPP LCD_COLOR8 46 #define CONFIG_LCD_LOGO 47 #undef LCD_TEST_PATTERN 48 #define CONFIG_LCD_INFO 49 #define CONFIG_LCD_INFO_BELOW_LOGO 50 #define CONFIG_ATMEL_LCD 51 #define CONFIG_ATMEL_LCD_RGB565 52 /* board specific(not enough SRAM) */ 53 #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000 54 55 /* LED */ 56 #define CONFIG_AT91_LED 57 #define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */ 58 59 60 /* 61 * BOOTP options 62 */ 63 #define CONFIG_BOOTP_BOOTFILESIZE 64 #define CONFIG_BOOTP_BOOTPATH 65 #define CONFIG_BOOTP_GATEWAY 66 #define CONFIG_BOOTP_HOSTNAME 67 68 /* Enable the watchdog */ 69 #define CONFIG_AT91SAM9_WATCHDOG 70 #define CONFIG_HW_WATCHDOG 71 72 /* 73 * Command line configuration. 74 */ 75 76 /* SDRAM */ 77 #define CONFIG_NR_DRAM_BANKS 2 78 #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */ 79 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 80 #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */ 81 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 82 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 83 84 #define CONFIG_SYS_INIT_SP_ADDR \ 85 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 86 87 /* MMC */ 88 89 #ifdef CONFIG_CMD_MMC 90 #define CONFIG_GENERIC_ATMEL_MCI 91 #endif 92 93 /* Ethernet */ 94 #define CONFIG_MACB 95 #define CONFIG_RMII 96 #define CONFIG_NET_RETRY_COUNT 20 97 #define CONFIG_RESET_PHY_R 98 #define CONFIG_AT91_WANTS_COMMON_PHY 99 100 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 101 102 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 103 #define CONFIG_SYS_MEMTEST_END 0x23e00000 104 105 #ifdef CONFIG_SYS_USE_MMC 106 /* bootstrap + u-boot + env + linux in mmc */ 107 #define CONFIG_ENV_SIZE 0x4000 108 109 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 110 "fatload mmc 0:1 0x22000000 zImage; " \ 111 "bootz 0x22000000 - 0x21000000" 112 #endif 113 114 #define CONFIG_SYS_CBSIZE 256 115 #define CONFIG_SYS_MAXARGS 16 116 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 117 + sizeof(CONFIG_SYS_PROMPT) + 16) 118 #define CONFIG_SYS_LONGHELP 119 #define CONFIG_CMDLINE_EDITING 120 #define CONFIG_AUTO_COMPLETE 121 122 /* 123 * Size of malloc() pool 124 */ 125 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 126 127 /* Defines for SPL */ 128 #define CONFIG_SPL_FRAMEWORK 129 #define CONFIG_SPL_TEXT_BASE 0x300000 130 #define CONFIG_SPL_MAX_SIZE 0x010000 131 #define CONFIG_SPL_STACK 0x310000 132 133 #define CONFIG_SYS_MONITOR_LEN 0x80000 134 135 #ifdef CONFIG_SYS_USE_MMC 136 137 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 138 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 139 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 140 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 141 142 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 143 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 144 145 #define CONFIG_SPL_ATMEL_SIZE 146 #define CONFIG_SYS_MASTER_CLOCK 132096000 147 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 148 #define CONFIG_SYS_MCKR 0x1301 149 #define CONFIG_SYS_MCKR_CSS 0x1302 150 151 #endif 152 #endif 153