xref: /openbmc/u-boot/include/configs/picosam9g45.h (revision 0f44d33536a50ef65259c322fa2d4a058585caf9)
1 /*
2  * Configuration settings for the mini-box PICOSAM9G45 board.
3  * (C) Copyright 2015 Inter Act B.V.
4  *
5  * Based on:
6  * U-Boot file: include/configs/at91sam9m10g45ek.h
7  * (C) Copyright 2007-2008
8  * Stelian Pop <stelian@popies.net>
9  * Lead Tech Design <www.leadtechdesign.com>
10  *
11  * SPDX-License-Identifier:	GPL-2.0+
12  */
13 
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16 
17 #include <asm/hardware.h>
18 
19 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
20 
21 /* ARM asynchronous clock */
22 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768
23 #define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
24 
25 #define CONFIG_PICOSAM
26 
27 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 #define CONFIG_SKIP_LOWLEVEL_INIT
31 
32 /* general purpose I/O */
33 #define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
34 #define CONFIG_AT91_GPIO
35 #define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */
36 
37 /* serial console */
38 #define CONFIG_ATMEL_USART
39 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
40 #define	CONFIG_USART_ID			ATMEL_ID_SYS
41 
42 /* LCD */
43 #define LCD_BPP				LCD_COLOR8
44 #define CONFIG_LCD_LOGO
45 #undef LCD_TEST_PATTERN
46 #define CONFIG_LCD_INFO
47 #define CONFIG_LCD_INFO_BELOW_LOGO
48 #define CONFIG_ATMEL_LCD
49 #define CONFIG_ATMEL_LCD_RGB565
50 /* board specific(not enough SRAM) */
51 #define CONFIG_AT91SAM9G45_LCD_BASE		0x23E00000
52 
53 /* LED */
54 #define CONFIG_AT91_LED
55 #define CONFIG_GREEN_LED	AT91_PIN_PD31	/* this is the user1 led */
56 
57 
58 /*
59  * BOOTP options
60  */
61 #define CONFIG_BOOTP_BOOTFILESIZE
62 #define CONFIG_BOOTP_BOOTPATH
63 #define CONFIG_BOOTP_GATEWAY
64 #define CONFIG_BOOTP_HOSTNAME
65 
66 /* Enable the watchdog */
67 #define CONFIG_AT91SAM9_WATCHDOG
68 #define CONFIG_HW_WATCHDOG
69 
70 /*
71  * Command line configuration.
72  */
73 
74 /* SDRAM */
75 #define CONFIG_NR_DRAM_BANKS	2
76 #define PHYS_SDRAM_1		ATMEL_BASE_CS1	/* on DDRSDRC1 */
77 #define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
78 #define PHYS_SDRAM_2		ATMEL_BASE_CS6	/* on DDRSDRC0 */
79 #define PHYS_SDRAM_2_SIZE       0x08000000	/* 128 MB */
80 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
81 
82 #define CONFIG_SYS_INIT_SP_ADDR \
83 	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
84 
85 /* MMC */
86 
87 #ifdef CONFIG_CMD_MMC
88 #define CONFIG_GENERIC_ATMEL_MCI
89 #endif
90 
91 /* Ethernet */
92 #define CONFIG_MACB
93 #define CONFIG_RMII
94 #define CONFIG_NET_RETRY_COUNT		20
95 #define CONFIG_RESET_PHY_R
96 #define CONFIG_AT91_WANTS_COMMON_PHY
97 
98 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
99 
100 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
101 #define CONFIG_SYS_MEMTEST_END		0x23e00000
102 
103 #ifdef CONFIG_SYS_USE_MMC
104 /* bootstrap + u-boot + env + linux in mmc */
105 #define CONFIG_ENV_SIZE		0x4000
106 
107 #define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 dtb; " \
108 				"fatload mmc 0:1 0x22000000 zImage; " \
109 				"bootz 0x22000000 - 0x21000000"
110 #endif
111 
112 #define CONFIG_SYS_LONGHELP
113 #define CONFIG_CMDLINE_EDITING
114 #define CONFIG_AUTO_COMPLETE
115 
116 /*
117  * Size of malloc() pool
118  */
119 #define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
120 
121 /* Defines for SPL */
122 #define CONFIG_SPL_TEXT_BASE		0x300000
123 #define CONFIG_SPL_MAX_SIZE		0x010000
124 #define CONFIG_SPL_STACK		0x310000
125 
126 #define CONFIG_SYS_MONITOR_LEN		0x80000
127 
128 #ifdef CONFIG_SYS_USE_MMC
129 
130 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
131 #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000
132 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000
133 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000
134 
135 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
136 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
137 
138 #define CONFIG_SPL_ATMEL_SIZE
139 #define CONFIG_SYS_MASTER_CLOCK		132096000
140 #define CONFIG_SYS_AT91_PLLA		0x20c73f03
141 #define CONFIG_SYS_MCKR			0x1301
142 #define CONFIG_SYS_MCKR_CSS		0x1302
143 
144 #endif
145 #endif
146