xref: /openbmc/u-boot/include/configs/pico-imx7d.h (revision d7869b21)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2017 NXP Semiconductors
4  *
5  * Configuration settings for the i.MX7D Pico board.
6  */
7 
8 #ifndef __PICO_IMX7D_CONFIG_H
9 #define __PICO_IMX7D_CONFIG_H
10 
11 #include "mx7_common.h"
12 
13 #include "imx7_spl.h"
14 
15 #ifdef CONFIG_SPL_OS_BOOT
16 /* Falcon Mode */
17 #define CONFIG_SPL_FS_LOAD_ARGS_NAME	"args"
18 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME	"uImage"
19 #define CONFIG_SYS_SPL_ARGS_ADDR	0x88000000
20 
21 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
22 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x800   /* 1MB */
23 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
24 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0x1000  /* 2MB */
25 #endif
26 
27 /* Size of malloc() pool */
28 #define CONFIG_SYS_MALLOC_LEN		(32 * SZ_1M)
29 
30 #define CONFIG_MXC_UART_BASE		UART5_IPS_BASE_ADDR
31 
32 /* Network */
33 #define CONFIG_FEC_MXC
34 #define CONFIG_FEC_XCV_TYPE		RGMII
35 #define CONFIG_ETHPRIME			"FEC"
36 #define CONFIG_FEC_MXC_PHYADDR		1
37 
38 #define CONFIG_PHY_ATHEROS
39 
40 /* ENET1 */
41 #define IMX_FEC_BASE			ENET_IPS_BASE_ADDR
42 
43 /* MMC Config */
44 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
45 
46 #define CONFIG_DFU_ENV_SETTINGS \
47 	"dfu_alt_info=" \
48 		"spl raw 0x2 0x400 mmcpart 1;" \
49 		"u-boot raw 0x8a 0x400 mmcpart 1;" \
50 		"/boot/zImage ext4 0 1;" \
51 		"/boot/imx7d-pico-pi.dtb ext4 0 1;" \
52 		"rootfs part 0 1\0" \
53 
54 #define BOOTMENU_ENV \
55 	"bootmenu_0=Boot using PICO-PI baseboard=" \
56 		"setenv fdtfile imx7d-pico-pi.dtb\0" \
57 
58 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
59 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
60 
61 #define CONFIG_EXTRA_ENV_SETTINGS \
62 	"script=boot.scr\0" \
63 	"image=zImage\0" \
64 	"console=ttymxc4\0" \
65 	"fdt_high=0xffffffff\0" \
66 	"initrd_high=0xffffffff\0" \
67 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
68 	BOOTMENU_ENV \
69 	"fdt_addr=0x83000000\0" \
70 	"fdt_addr_r=0x83000000\0" \
71 	"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
72 	"pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
73 	"ramdisk_addr_r=0x83000000\0" \
74 	"ramdiskaddr=0x83000000\0" \
75 	"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
76 	CONFIG_DFU_ENV_SETTINGS \
77 	"findfdt=" \
78 		"if test $fdtfile = ask ; then " \
79 			"bootmenu -1; fi;" \
80 		"if test $fdtfile != ask ; then " \
81 			"saveenv; fi;\0" \
82 	"finduuid=part uuid mmc 0:1 uuid\0" \
83 	"partitions=" \
84 		"uuid_disk=${uuid_gpt_disk};" \
85 		"name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \
86 	"fastboot_partition_alias_system=rootfs\0" \
87 	"setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \
88 	BOOTENV
89 
90 #define BOOT_TARGET_DEVICES(func) \
91 	func(MMC, mmc, 0) \
92 	func(DHCP, dhcp, na)
93 
94 #include <config_distro_bootcmd.h>
95 
96 #define CONFIG_SYS_MEMTEST_START	0x80000000
97 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
98 
99 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
100 #define CONFIG_SYS_HZ			1000
101 
102 /* Physical Memory Map */
103 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
104 
105 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
106 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
107 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
108 
109 #define CONFIG_SYS_INIT_SP_OFFSET \
110 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
111 #define CONFIG_SYS_INIT_SP_ADDR \
112 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
113 
114 /* I2C configs */
115 #define CONFIG_SYS_I2C
116 #define CONFIG_SYS_I2C_MXC
117 #define CONFIG_SYS_I2C_MXC_I2C1
118 #define CONFIG_SYS_I2C_MXC_I2C2
119 #define CONFIG_SYS_I2C_MXC_I2C3
120 #define CONFIG_SYS_I2C_MXC_I2C4
121 #define CONFIG_SYS_I2C_SPEED		100000
122 
123 /* PMIC */
124 #define CONFIG_POWER
125 #define CONFIG_POWER_I2C
126 #define CONFIG_POWER_PFUZE3000
127 #define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
128 
129 /* FLASH and environment organization */
130 #define CONFIG_ENV_SIZE			SZ_8K
131 
132 #define CONFIG_ENV_OFFSET			(8 * SZ_64K)
133 #define CONFIG_SYS_FSL_USDHC_NUM		2
134 
135 #define CONFIG_SYS_MMC_ENV_DEV			0
136 #define CONFIG_SYS_MMC_ENV_PART		0
137 
138 /* USB Configs */
139 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
140 #define CONFIG_MXC_USB_PORTSC			(PORT_PTS_UTMI | PORT_PTS_PTW)
141 #define CONFIG_MXC_USB_FLAGS			0
142 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
143 
144 #define CONFIG_IMX_THERMAL
145 
146 #endif
147