1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2017 NXP Semiconductors 4 * 5 * Configuration settings for the i.MX7D Pico board. 6 */ 7 8 #ifndef __PICO_IMX7D_CONFIG_H 9 #define __PICO_IMX7D_CONFIG_H 10 11 #include "mx7_common.h" 12 13 #include "imx7_spl.h" 14 15 /* Size of malloc() pool */ 16 #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) 17 18 #define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR 19 20 /* Network */ 21 #define CONFIG_FEC_MXC 22 #define CONFIG_MII 23 #define CONFIG_FEC_XCV_TYPE RGMII 24 #define CONFIG_ETHPRIME "FEC" 25 #define CONFIG_FEC_MXC_PHYADDR 1 26 27 #define CONFIG_PHY_ATHEROS 28 29 /* ENET1 */ 30 #define IMX_FEC_BASE ENET_IPS_BASE_ADDR 31 32 /* MMC Config */ 33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 34 35 #define CONFIG_DFU_ENV_SETTINGS \ 36 "dfu_alt_info=u-boot raw 0x2 0x400 mmcpart 1;" \ 37 "/boot/zImage ext4 0 1;" \ 38 "/boot/imx7d-pico-pi.dtb ext4 0 1;" \ 39 "rootfs part 0 1\0" \ 40 41 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 42 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 43 44 #define CONFIG_EXTRA_ENV_SETTINGS \ 45 "script=boot.scr\0" \ 46 "image=zImage\0" \ 47 "console=ttymxc4\0" \ 48 "fdt_high=0xffffffff\0" \ 49 "initrd_high=0xffffffff\0" \ 50 "fdtfile=imx7d-pico-pi.dtb\0" \ 51 "fdt_addr=0x83000000\0" \ 52 "fdt_addr_r=0x83000000\0" \ 53 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 54 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 55 "ramdisk_addr_r=0x83000000\0" \ 56 "ramdiskaddr=0x83000000\0" \ 57 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \ 58 CONFIG_DFU_ENV_SETTINGS \ 59 "finduuid=part uuid mmc 0:1 uuid\0" \ 60 "partitions=" \ 61 "uuid_disk=${uuid_gpt_disk};" \ 62 "name=rootfs,size=0,uuid=${uuid_gpt_rootfs}\0" \ 63 "fastboot_partition_alias_system=rootfs\0" \ 64 "setup_emmc=mmc dev 0; gpt write mmc 0 $partitions; reset;\0" \ 65 BOOTENV 66 67 #define BOOT_TARGET_DEVICES(func) \ 68 func(MMC, mmc, 0) \ 69 func(DHCP, dhcp, na) 70 71 #include <config_distro_bootcmd.h> 72 73 #define CONFIG_SYS_MEMTEST_START 0x80000000 74 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) 75 76 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 77 #define CONFIG_SYS_HZ 1000 78 79 /* Physical Memory Map */ 80 #define CONFIG_NR_DRAM_BANKS 1 81 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 82 83 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 84 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 85 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 86 87 #define CONFIG_SYS_INIT_SP_OFFSET \ 88 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 89 #define CONFIG_SYS_INIT_SP_ADDR \ 90 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 91 92 /* I2C configs */ 93 #define CONFIG_SYS_I2C 94 #define CONFIG_SYS_I2C_MXC 95 #define CONFIG_SYS_I2C_MXC_I2C1 96 #define CONFIG_SYS_I2C_MXC_I2C2 97 #define CONFIG_SYS_I2C_MXC_I2C3 98 #define CONFIG_SYS_I2C_MXC_I2C4 99 #define CONFIG_SYS_I2C_SPEED 100000 100 101 /* PMIC */ 102 #define CONFIG_POWER 103 #define CONFIG_POWER_I2C 104 #define CONFIG_POWER_PFUZE3000 105 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 106 107 /* FLASH and environment organization */ 108 #define CONFIG_ENV_SIZE SZ_8K 109 110 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 111 #define CONFIG_SYS_FSL_USDHC_NUM 2 112 113 #define CONFIG_SYS_MMC_ENV_DEV 0 114 #define CONFIG_SYS_MMC_ENV_PART 0 115 116 /* USB Configs */ 117 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 118 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 119 #define CONFIG_MXC_USB_FLAGS 0 120 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 121 122 #define CONFIG_IMX_THERMAL 123 124 #endif 125