1 /* 2 * Copyright (C) 2015 Technexion Ltd. 3 * 4 * Configuration settings for the Technexion PICO-IMX6UL-EMMC board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef __PICO_IMX6UL_CONFIG_H 9 #define __PICO_IMX6UL_CONFIG_H 10 11 12 #include <asm/arch/imx-regs.h> 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 #include <asm/imx-common/gpio.h> 16 17 /* Network support */ 18 19 #define CONFIG_FEC_MXC 20 #define CONFIG_MII 21 #define IMX_FEC_BASE ENET2_BASE_ADDR 22 #define CONFIG_FEC_MXC_PHYADDR 0x1 23 #define CONFIG_FEC_XCV_TYPE RMII 24 #define CONFIG_PHYLIB 25 #define CONFIG_PHY_MICREL 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */ 29 30 #define CONFIG_BOARD_EARLY_INIT_F 31 32 #define CONFIG_MXC_UART 33 #define CONFIG_MXC_UART_BASE UART6_BASE_ADDR 34 35 /* MMC Configs */ 36 #define CONFIG_FSL_USDHC 37 #define CONFIG_FSL_ESDHC 38 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR 39 40 #define CONFIG_MMC 41 #define CONFIG_GENERIC_MMC 42 #define CONFIG_DOS_PARTITION 43 #define CONFIG_SUPPORT_EMMC_BOOT 44 45 /* USB Configs */ 46 #define CONFIG_USB_EHCI 47 #define CONFIG_USB_EHCI_MX6 48 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 49 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 50 #define CONFIG_MXC_USB_FLAGS 0 51 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 52 53 #define CONFIG_USBD_HS 54 55 #define CONFIG_USB_FUNCTION_MASS_STORAGE 56 #define CONFIG_USB_GADGET_VBUS_DRAW 2 57 58 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 59 #define DFU_DEFAULT_POLL_TIMEOUT 300 60 61 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 62 63 #define CONFIG_EXTRA_ENV_SETTINGS \ 64 "image=zImage\0" \ 65 "console=ttymxc5\0" \ 66 "fdt_high=0xffffffff\0" \ 67 "initrd_high=0xffffffff\0" \ 68 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 69 "fdt_addr=0x83000000\0" \ 70 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 71 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 72 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 73 "mmcautodetect=yes\0" \ 74 "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ 75 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 76 "root=${mmcroot}\0" \ 77 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 78 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 79 "mmcboot=echo Booting from mmc ...; " \ 80 "run mmcargs; " \ 81 "if run loadfdt; then " \ 82 "bootz ${loadaddr} - ${fdt_addr}; " \ 83 "else " \ 84 "echo WARN: Cannot load the DT; " \ 85 "fi;\0" \ 86 "netargs=setenv bootargs console=${console},${baudrate} " \ 87 "root=/dev/nfs " \ 88 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 89 "netboot=echo Booting from net ...; " \ 90 "run netargs; " \ 91 "if test ${ip_dyn} = yes; then " \ 92 "setenv get_cmd dhcp; " \ 93 "else " \ 94 "setenv get_cmd tftp; " \ 95 "fi; " \ 96 "${get_cmd} ${image}; " \ 97 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 98 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 99 "bootz ${loadaddr} - ${fdt_addr}; " \ 100 "else " \ 101 "if test ${boot_fdt} = try; then " \ 102 "bootz; " \ 103 "else " \ 104 "echo WARN: Cannot load the DT; " \ 105 "fi; " \ 106 "fi; " \ 107 "else " \ 108 "bootz; " \ 109 "fi;\0" \ 110 111 #define CONFIG_BOOTCOMMAND \ 112 "if mmc rescan; then " \ 113 "if run loadimage; then " \ 114 "run mmcboot; " \ 115 "else run netboot; " \ 116 "fi; " \ 117 "else run netboot; fi" 118 119 #define CONFIG_SYS_MEMTEST_START 0x80000000 120 #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + SZ_128M 121 122 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 123 #define CONFIG_SYS_HZ 1000 124 125 #define CONFIG_CMDLINE_EDITING 126 #define CONFIG_STACKSIZE SZ_128K 127 128 /* Physical Memory Map */ 129 #define CONFIG_NR_DRAM_BANKS 1 130 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 131 132 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 133 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 134 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 135 136 #define CONFIG_SYS_INIT_SP_OFFSET \ 137 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 138 #define CONFIG_SYS_INIT_SP_ADDR \ 139 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 140 141 /* I2C configs */ 142 #define CONFIG_SYS_I2C 143 #define CONFIG_SYS_I2C_MXC 144 #define CONFIG_SYS_I2C_MXC_I2C1 145 #define CONFIG_SYS_I2C_SPEED 100000 146 147 /* PMIC */ 148 #define CONFIG_POWER 149 #define CONFIG_POWER_I2C 150 #define CONFIG_POWER_PFUZE3000 151 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 152 153 /* FLASH and environment organization */ 154 #define CONFIG_SYS_NO_FLASH 155 156 #define CONFIG_ENV_SIZE SZ_8K 157 #define CONFIG_ENV_IS_IN_MMC 158 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 159 160 #define CONFIG_SYS_MMC_ENV_DEV 0 161 #define CONFIG_SYS_MMC_ENV_PART 0 162 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 163 164 #endif /* __PICO_IMX6UL_CONFIG_H */ 165