1 /* 2 * Copyright (C) 2015 Technexion Ltd. 3 * 4 * Configuration settings for the Technexion PICO-IMX6UL-EMMC board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 #ifndef __PICO_IMX6UL_CONFIG_H 9 #define __PICO_IMX6UL_CONFIG_H 10 11 12 #include <asm/arch/imx-regs.h> 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 #include <asm/imx-common/gpio.h> 16 17 /* Network support */ 18 19 #define CONFIG_FEC_MXC 20 #define CONFIG_MII 21 #define IMX_FEC_BASE ENET2_BASE_ADDR 22 #define CONFIG_FEC_MXC_PHYADDR 0x1 23 #define CONFIG_FEC_XCV_TYPE RMII 24 #define CONFIG_PHYLIB 25 #define CONFIG_PHY_MICREL 26 27 /* Size of malloc() pool */ 28 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* Increase due to DFU */ 29 30 #define CONFIG_BOARD_EARLY_INIT_F 31 32 #define CONFIG_MXC_UART 33 #define CONFIG_MXC_UART_BASE UART6_BASE_ADDR 34 35 /* MMC Configs */ 36 #define CONFIG_FSL_USDHC 37 #define CONFIG_FSL_ESDHC 38 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR 39 40 #define CONFIG_GENERIC_MMC 41 #define CONFIG_DOS_PARTITION 42 #define CONFIG_SUPPORT_EMMC_BOOT 43 44 /* USB Configs */ 45 #define CONFIG_USB_EHCI 46 #define CONFIG_USB_EHCI_MX6 47 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 48 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 49 #define CONFIG_MXC_USB_FLAGS 0 50 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 51 52 #define CONFIG_USBD_HS 53 54 #define CONFIG_USB_FUNCTION_MASS_STORAGE 55 #define CONFIG_USB_GADGET_VBUS_DRAW 2 56 57 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M 58 #define DFU_DEFAULT_POLL_TIMEOUT 300 59 60 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 61 62 #define CONFIG_EXTRA_ENV_SETTINGS \ 63 "image=zImage\0" \ 64 "console=ttymxc5\0" \ 65 "fdt_high=0xffffffff\0" \ 66 "initrd_high=0xffffffff\0" \ 67 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 68 "fdt_addr=0x83000000\0" \ 69 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ 70 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ 71 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ 72 "mmcautodetect=yes\0" \ 73 "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ 74 "mmcargs=setenv bootargs console=${console},${baudrate} " \ 75 "root=${mmcroot}\0" \ 76 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 77 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 78 "mmcboot=echo Booting from mmc ...; " \ 79 "run mmcargs; " \ 80 "if run loadfdt; then " \ 81 "bootz ${loadaddr} - ${fdt_addr}; " \ 82 "else " \ 83 "echo WARN: Cannot load the DT; " \ 84 "fi;\0" \ 85 "netargs=setenv bootargs console=${console},${baudrate} " \ 86 "root=/dev/nfs " \ 87 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 88 "netboot=echo Booting from net ...; " \ 89 "run netargs; " \ 90 "if test ${ip_dyn} = yes; then " \ 91 "setenv get_cmd dhcp; " \ 92 "else " \ 93 "setenv get_cmd tftp; " \ 94 "fi; " \ 95 "${get_cmd} ${image}; " \ 96 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 97 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 98 "bootz ${loadaddr} - ${fdt_addr}; " \ 99 "else " \ 100 "if test ${boot_fdt} = try; then " \ 101 "bootz; " \ 102 "else " \ 103 "echo WARN: Cannot load the DT; " \ 104 "fi; " \ 105 "fi; " \ 106 "else " \ 107 "bootz; " \ 108 "fi;\0" \ 109 110 #define CONFIG_BOOTCOMMAND \ 111 "if mmc rescan; then " \ 112 "if run loadimage; then " \ 113 "run mmcboot; " \ 114 "else run netboot; " \ 115 "fi; " \ 116 "else run netboot; fi" 117 118 #define CONFIG_SYS_MEMTEST_START 0x80000000 119 #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_MEMTEST_START + SZ_128M 120 121 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 122 #define CONFIG_SYS_HZ 1000 123 124 #define CONFIG_CMDLINE_EDITING 125 #define CONFIG_STACKSIZE SZ_128K 126 127 /* Physical Memory Map */ 128 #define CONFIG_NR_DRAM_BANKS 1 129 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 130 131 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 132 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 133 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 134 135 #define CONFIG_SYS_INIT_SP_OFFSET \ 136 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 137 #define CONFIG_SYS_INIT_SP_ADDR \ 138 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 139 140 /* I2C configs */ 141 #define CONFIG_SYS_I2C 142 #define CONFIG_SYS_I2C_MXC 143 #define CONFIG_SYS_I2C_MXC_I2C1 144 #define CONFIG_SYS_I2C_SPEED 100000 145 146 /* PMIC */ 147 #define CONFIG_POWER 148 #define CONFIG_POWER_I2C 149 #define CONFIG_POWER_PFUZE3000 150 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 151 152 /* FLASH and environment organization */ 153 #define CONFIG_SYS_NO_FLASH 154 155 #define CONFIG_ENV_SIZE SZ_8K 156 #define CONFIG_ENV_IS_IN_MMC 157 #define CONFIG_ENV_OFFSET (8 * SZ_64K) 158 159 #define CONFIG_SYS_MMC_ENV_DEV 0 160 #define CONFIG_SYS_MMC_ENV_PART 0 161 #define CONFIG_MMCROOT "/dev/mmcblk0p2" 162 163 #endif /* __PICO_IMX6UL_CONFIG_H */ 164