xref: /openbmc/u-boot/include/configs/peach-pi.h (revision 43900da8)
179043d84SAkshay Saraswat /*
279043d84SAkshay Saraswat  * Copyright (C) 2014 Samsung Electronics
379043d84SAkshay Saraswat  *
479043d84SAkshay Saraswat  * Configuration settings for the SAMSUNG/GOOGLE PEACH-PI board.
579043d84SAkshay Saraswat  *
679043d84SAkshay Saraswat  * SPDX-License-Identifier:	GPL-2.0+
779043d84SAkshay Saraswat  */
879043d84SAkshay Saraswat 
979043d84SAkshay Saraswat #ifndef __CONFIG_PEACH_PI_H
1079043d84SAkshay Saraswat #define __CONFIG_PEACH_PI_H
1179043d84SAkshay Saraswat 
1279043d84SAkshay Saraswat #define CONFIG_ENV_IS_IN_SPI_FLASH
1379043d84SAkshay Saraswat #define CONFIG_SPI_FLASH
1479043d84SAkshay Saraswat #define CONFIG_ENV_SPI_BASE	0x12D30000
1579043d84SAkshay Saraswat #define FLASH_SIZE		(0x4 << 20)
1679043d84SAkshay Saraswat #define CONFIG_ENV_OFFSET	(FLASH_SIZE - CONFIG_BL2_SIZE)
17*43900da8SHyungwon Hwang #define CONFIG_SPI_BOOTING
1879043d84SAkshay Saraswat 
1979043d84SAkshay Saraswat #include <configs/exynos5420-common.h>
2079043d84SAkshay Saraswat #include <configs/exynos5-dt-common.h>
2179043d84SAkshay Saraswat 
2279043d84SAkshay Saraswat #define CONFIG_BOARD_COMMON
2379043d84SAkshay Saraswat 
24*43900da8SHyungwon Hwang #define CONFIG_SYS_SDRAM_BASE	0x20000000
25*43900da8SHyungwon Hwang #define CONFIG_SYS_TEXT_BASE	0x23E00000
26*43900da8SHyungwon Hwang #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_IRAM_TOP - 0x800)
27*43900da8SHyungwon Hwang 
2879043d84SAkshay Saraswat /* select serial console configuration */
2979043d84SAkshay Saraswat #define CONFIG_SERIAL3		/* use SERIAL 3 */
30*43900da8SHyungwon Hwang #define CONFIG_DEFAULT_CONSOLE	"console=ttySAC1,115200n8\0"
3179043d84SAkshay Saraswat 
3279043d84SAkshay Saraswat #define CONFIG_SYS_PROMPT	"Peach-Pi # "
3379043d84SAkshay Saraswat #define CONFIG_IDENT_STRING	" for Peach-Pi"
3479043d84SAkshay Saraswat 
3579043d84SAkshay Saraswat #define CONFIG_VIDEO_PARADE
3679043d84SAkshay Saraswat 
3779043d84SAkshay Saraswat /* Display */
3879043d84SAkshay Saraswat #define CONFIG_LCD
3979043d84SAkshay Saraswat #ifdef CONFIG_LCD
4079043d84SAkshay Saraswat #define CONFIG_EXYNOS_FB
4179043d84SAkshay Saraswat #define CONFIG_EXYNOS_DP
4279043d84SAkshay Saraswat #define LCD_BPP			LCD_COLOR16
4379043d84SAkshay Saraswat #endif
4479043d84SAkshay Saraswat 
4579043d84SAkshay Saraswat #define CONFIG_POWER_TPS65090_EC
4679043d84SAkshay Saraswat #define CONFIG_CROS_EC_SPI		/* Support CROS_EC over SPI */
4779043d84SAkshay Saraswat #define CONFIG_DM_CROS_EC
4879043d84SAkshay Saraswat 
4979043d84SAkshay Saraswat #define CONFIG_USB_XHCI
5079043d84SAkshay Saraswat #define CONFIG_USB_XHCI_EXYNOS
5179043d84SAkshay Saraswat 
5243581c83SAkshay Saraswat /* DRAM Memory Banks */
5343581c83SAkshay Saraswat #define CONFIG_NR_DRAM_BANKS	7
5443581c83SAkshay Saraswat #define SDRAM_BANK_SIZE		(512UL << 20UL)	/* 512 MB */
5543581c83SAkshay Saraswat 
5679043d84SAkshay Saraswat #endif	/* __CONFIG_PEACH_PI_H */
57