1 /* 2 * Copyright (C) Stefano Babic <sbabic@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 8 #ifndef __PCM058_CONFIG_H 9 #define __PCM058_CONFIG_H 10 11 #include <config_distro_defaults.h> 12 13 #ifdef CONFIG_SPL 14 #define CONFIG_SPL_SPI_LOAD 15 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 16 #include "imx6_spl.h" 17 #endif 18 19 #include "mx6_common.h" 20 21 /* Thermal */ 22 #define CONFIG_IMX_THERMAL 23 24 /* Serial */ 25 #define CONFIG_MXC_UART 26 #define CONFIG_MXC_UART_BASE UART2_BASE 27 #define CONSOLE_DEV "ttymxc1" 28 29 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 30 31 /* Early setup */ 32 #define CONFIG_BOARD_EARLY_INIT_F 33 #define CONFIG_BOARD_LATE_INIT 34 #define CONFIG_DISPLAY_BOARDINFO_LATE 35 36 37 /* Size of malloc() pool */ 38 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) 39 40 /* Ethernet */ 41 #define CONFIG_FEC_MXC 42 #define CONFIG_MII 43 #define IMX_FEC_BASE ENET_BASE_ADDR 44 #define CONFIG_FEC_XCV_TYPE RGMII 45 #define CONFIG_ETHPRIME "FEC" 46 #define CONFIG_FEC_MXC_PHYADDR 3 47 48 #define CONFIG_PHYLIB 49 #define CONFIG_PHY_MICREL 50 #define CONFIG_PHY_KSZ9031 51 52 /* SPI Flash */ 53 #define CONFIG_MXC_SPI 54 #define CONFIG_SF_DEFAULT_BUS 0 55 #define CONFIG_SF_DEFAULT_CS 0 56 #define CONFIG_SF_DEFAULT_SPEED 20000000 57 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 58 59 /* I2C Configs */ 60 #define CONFIG_SYS_I2C 61 #define CONFIG_SYS_I2C_MXC 62 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */ 63 #define CONFIG_SYS_I2C_SPEED 100000 64 65 #ifndef CONFIG_SPL_BUILD 66 #define CONFIG_CMD_NAND 67 /* Enable NAND support */ 68 #define CONFIG_CMD_NAND_TRIMFFS 69 #define CONFIG_NAND_MXS 70 #define CONFIG_SYS_MAX_NAND_DEVICE 1 71 #define CONFIG_SYS_NAND_BASE 0x40000000 72 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 73 #define CONFIG_SYS_NAND_ONFI_DETECTION 74 #endif 75 76 /* DMA stuff, needed for GPMI/MXS NAND support */ 77 #define CONFIG_APBH_DMA 78 #define CONFIG_APBH_DMA_BURST 79 #define CONFIG_APBH_DMA_BURST8 80 81 /* Filesystem support */ 82 #define CONFIG_LZO 83 #define CONFIG_CMD_UBIFS 84 #define CONFIG_CMD_MTDPARTS 85 #define CONFIG_MTD_PARTITIONS 86 #define CONFIG_MTD_DEVICE 87 #define MTDIDS_DEFAULT "nand0=nand" 88 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" 89 90 /* Various command support */ 91 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ 92 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ 93 #define CONFIG_CMD_GSC 94 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ 95 #define CONFIG_RBTREE 96 97 /* Physical Memory Map */ 98 #define CONFIG_NR_DRAM_BANKS 1 99 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 100 101 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 102 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 103 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 104 105 #define CONFIG_SYS_INIT_SP_OFFSET \ 106 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 107 #define CONFIG_SYS_INIT_SP_ADDR \ 108 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 109 110 /* MMC Configs */ 111 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 112 #define CONFIG_SYS_FSL_USDHC_NUM 1 113 114 /* Environment organization */ 115 #define CONFIG_ENV_IS_IN_SPI_FLASH 116 #define CONFIG_ENV_SIZE (16 * 1024) 117 #define CONFIG_ENV_OFFSET (1024 * SZ_1K) 118 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) 119 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 120 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 121 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 122 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 123 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 124 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 125 CONFIG_ENV_SECT_SIZE) 126 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 127 128 #ifdef CONFIG_ENV_IS_IN_NAND 129 #define CONFIG_ENV_OFFSET (0x1E0000) 130 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) 131 #endif 132 133 #endif 134