1 /* 2 * Copyright (C) Stefano Babic <sbabic@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 8 #ifndef __PCM058_CONFIG_H 9 #define __PCM058_CONFIG_H 10 11 #ifdef CONFIG_SPL 12 #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) 13 #include "imx6_spl.h" 14 #endif 15 16 #include "mx6_common.h" 17 18 /* Thermal */ 19 #define CONFIG_IMX_THERMAL 20 21 /* Serial */ 22 #define CONFIG_MXC_UART 23 #define CONFIG_MXC_UART_BASE UART2_BASE 24 #define CONSOLE_DEV "ttymxc1" 25 26 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 27 28 /* Early setup */ 29 30 31 /* Size of malloc() pool */ 32 #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) 33 34 /* Ethernet */ 35 #define CONFIG_FEC_MXC 36 #define CONFIG_MII 37 #define IMX_FEC_BASE ENET_BASE_ADDR 38 #define CONFIG_FEC_XCV_TYPE RGMII 39 #define CONFIG_ETHPRIME "FEC" 40 #define CONFIG_FEC_MXC_PHYADDR 3 41 42 /* SPI Flash */ 43 #define CONFIG_SF_DEFAULT_BUS 0 44 #define CONFIG_SF_DEFAULT_CS 0 45 #define CONFIG_SF_DEFAULT_SPEED 20000000 46 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 47 48 /* I2C Configs */ 49 #define CONFIG_SYS_I2C 50 #define CONFIG_SYS_I2C_MXC 51 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 2 */ 52 #define CONFIG_SYS_I2C_SPEED 100000 53 54 #ifndef CONFIG_SPL_BUILD 55 /* Enable NAND support */ 56 #define CONFIG_SYS_MAX_NAND_DEVICE 1 57 #define CONFIG_SYS_NAND_BASE 0x40000000 58 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 59 #define CONFIG_SYS_NAND_ONFI_DETECTION 60 #endif 61 62 /* DMA stuff, needed for GPMI/MXS NAND support */ 63 64 /* Filesystem support */ 65 #define CONFIG_MTD_PARTITIONS 66 #define CONFIG_MTD_DEVICE 67 68 /* Physical Memory Map */ 69 #define CONFIG_NR_DRAM_BANKS 1 70 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 71 72 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 73 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 74 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 75 76 #define CONFIG_SYS_INIT_SP_OFFSET \ 77 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 78 #define CONFIG_SYS_INIT_SP_ADDR \ 79 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 80 81 /* MMC Configs */ 82 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 83 #define CONFIG_SYS_FSL_USDHC_NUM 1 84 85 /* Environment organization */ 86 #define CONFIG_ENV_SIZE (16 * 1024) 87 #define CONFIG_ENV_OFFSET (1024 * SZ_1K) 88 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) 89 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 90 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 91 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 92 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 93 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 94 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 95 CONFIG_ENV_SECT_SIZE) 96 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 97 98 #ifdef CONFIG_ENV_IS_IN_NAND 99 #define CONFIG_ENV_OFFSET (0x1E0000) 100 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) 101 #endif 102 103 #endif 104