xref: /openbmc/u-boot/include/configs/pcm058.h (revision 3788b451)
1 /*
2  * Copyright (C) Stefano Babic <sbabic@denx.de>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 
8 #ifndef __PCM058_CONFIG_H
9 #define __PCM058_CONFIG_H
10 
11 #include <config_distro_defaults.h>
12 
13 #ifdef CONFIG_SPL
14 #define CONFIG_SPL_SPI_LOAD
15 #define CONFIG_SYS_SPI_U_BOOT_OFFS	(64 * 1024)
16 #include "imx6_spl.h"
17 #endif
18 
19 #include "mx6_common.h"
20 
21 /* Thermal */
22 #define CONFIG_IMX_THERMAL
23 
24 /* Serial */
25 #define CONFIG_MXC_UART
26 #define CONFIG_MXC_UART_BASE	       UART2_BASE
27 #define CONSOLE_DEV		"ttymxc1"
28 
29 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
30 
31 /* Early setup */
32 #define CONFIG_BOARD_EARLY_INIT_F
33 #define CONFIG_DISPLAY_BOARDINFO_LATE
34 
35 
36 /* Size of malloc() pool */
37 #define CONFIG_SYS_MALLOC_LEN		(8 * SZ_1M)
38 
39 /* Ethernet */
40 #define CONFIG_FEC_MXC
41 #define CONFIG_MII
42 #define IMX_FEC_BASE			ENET_BASE_ADDR
43 #define CONFIG_FEC_XCV_TYPE		RGMII
44 #define CONFIG_ETHPRIME			"FEC"
45 #define CONFIG_FEC_MXC_PHYADDR		3
46 
47 #define CONFIG_PHYLIB
48 #define CONFIG_PHY_MICREL
49 #define CONFIG_PHY_KSZ9031
50 
51 /* SPI Flash */
52 #define CONFIG_MXC_SPI
53 #define CONFIG_SF_DEFAULT_BUS		0
54 #define CONFIG_SF_DEFAULT_CS		0
55 #define CONFIG_SF_DEFAULT_SPEED		20000000
56 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
57 
58 /* I2C Configs */
59 #define CONFIG_SYS_I2C
60 #define CONFIG_SYS_I2C_MXC
61 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 2 */
62 #define CONFIG_SYS_I2C_SPEED		  100000
63 
64 #ifndef CONFIG_SPL_BUILD
65 #define CONFIG_CMD_NAND
66 /* Enable NAND support */
67 #define CONFIG_CMD_NAND_TRIMFFS
68 #define CONFIG_NAND_MXS
69 #define CONFIG_SYS_MAX_NAND_DEVICE	1
70 #define CONFIG_SYS_NAND_BASE		0x40000000
71 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
72 #define CONFIG_SYS_NAND_ONFI_DETECTION
73 #endif
74 
75 /* DMA stuff, needed for GPMI/MXS NAND support */
76 #define CONFIG_APBH_DMA
77 #define CONFIG_APBH_DMA_BURST
78 #define CONFIG_APBH_DMA_BURST8
79 
80 /* Filesystem support */
81 #define CONFIG_LZO
82 #define CONFIG_CMD_UBIFS
83 #define CONFIG_CMD_MTDPARTS
84 #define CONFIG_MTD_PARTITIONS
85 #define CONFIG_MTD_DEVICE
86 #define MTDIDS_DEFAULT    "nand0=nand"
87 #define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
88 
89 /* Various command support */
90 #define CONFIG_CMD_BMODE         /* set eFUSE shadow for a boot dev and reset */
91 #define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
92 #define CONFIG_CMD_GSC
93 #define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
94 #define CONFIG_RBTREE
95 
96 /* Physical Memory Map */
97 #define CONFIG_NR_DRAM_BANKS           1
98 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
99 
100 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
101 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
102 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
103 
104 #define CONFIG_SYS_INIT_SP_OFFSET \
105 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
106 #define CONFIG_SYS_INIT_SP_ADDR \
107 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
108 
109 /* MMC Configs */
110 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
111 #define CONFIG_SYS_FSL_USDHC_NUM	1
112 
113 /* Environment organization */
114 #define CONFIG_ENV_IS_IN_SPI_FLASH
115 #define CONFIG_ENV_SIZE                (16 * 1024)
116 #define CONFIG_ENV_OFFSET		(1024 * SZ_1K)
117 #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
118 #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
119 #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
120 #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
121 #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
122 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
123 #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + \
124 						CONFIG_ENV_SECT_SIZE)
125 #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
126 
127 #ifdef CONFIG_ENV_IS_IN_NAND
128 #define CONFIG_ENV_OFFSET              (0x1E0000)
129 #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
130 #endif
131 
132 #endif
133