xref: /openbmc/u-boot/include/configs/pcm052.h (revision d77af8a8)
1 /*
2  * Copyright 2013 Freescale Semiconductor, Inc.
3  *
4  * Configuration settings for the phytec PCM-052 SoM.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #ifndef __CONFIG_H
10 #define __CONFIG_H
11 
12 #include <asm/arch/imx-regs.h>
13 
14 #define CONFIG_SKIP_LOWLEVEL_INIT
15 
16 /* Enable passing of ATAGs */
17 #define CONFIG_CMDLINE_TAG
18 
19 /* Size of malloc() pool */
20 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)
21 
22 /* Allow to overwrite serial and ethaddr */
23 #define CONFIG_ENV_OVERWRITE
24 
25 /* NAND support */
26 #define CONFIG_CMD_NAND
27 #define CONFIG_CMD_NAND_TRIMFFS
28 #define CONFIG_SYS_NAND_ONFI_DETECTION
29 
30 #ifdef CONFIG_CMD_NAND
31 #define CONFIG_SYS_MAX_NAND_DEVICE	1
32 #define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
33 
34 #define CONFIG_JFFS2_NAND
35 
36 /* UBI */
37 #define CONFIG_CMD_UBIFS
38 #define CONFIG_RBTREE
39 #define CONFIG_LZO
40 
41 /* Dynamic MTD partition support */
42 #define CONFIG_CMD_MTDPARTS
43 #define CONFIG_MTD_PARTITIONS
44 #define CONFIG_MTD_DEVICE
45 
46 #ifndef MTDIDS_DEFAULT
47 #define MTDIDS_DEFAULT			"nand0=NAND"
48 #endif
49 
50 #ifndef MTDPARTS_DEFAULT
51 #define MTDPARTS_DEFAULT		"mtdparts=NAND:640k(bootloader)"\
52 					",128k(env1)"\
53 					",128k(env2)"\
54 					",128k(dtb)"\
55 					",6144k(kernel)"\
56 					",-(root)"
57 #endif
58 
59 #endif
60 
61 #define CONFIG_FSL_ESDHC
62 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
63 #define CONFIG_SYS_FSL_ESDHC_NUM	1
64 
65 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
66 
67 #define CONFIG_FEC_MXC
68 #define CONFIG_MII
69 #define IMX_FEC_BASE			ENET_BASE_ADDR
70 #define CONFIG_FEC_XCV_TYPE		RMII
71 #define CONFIG_FEC_MXC_PHYADDR          0
72 #define CONFIG_PHYLIB
73 #define CONFIG_PHY_MICREL
74 
75 /* QSPI Configs*/
76 
77 #ifdef CONFIG_FSL_QSPI
78 #define FSL_QSPI_FLASH_SIZE		(1 << 24)
79 #define FSL_QSPI_FLASH_NUM		2
80 #define CONFIG_SYS_FSL_QSPI_LE
81 #endif
82 
83 /* I2C Configs */
84 #define CONFIG_SYS_I2C
85 #define CONFIG_SYS_I2C_MXC_I2C3
86 #define CONFIG_SYS_I2C_MXC
87 
88 /* RTC (actually an RV-4162 but M41T62-compatible) */
89 #define CONFIG_RTC_M41T62
90 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
91 #define CONFIG_SYS_RTC_BUS_NUM 2
92 
93 /* EEPROM (24FC256) */
94 #define CONFIG_CMD_EEPROM
95 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
96 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
97 #define CONFIG_SYS_I2C_EEPROM_BUS 2
98 
99 
100 #define CONFIG_LOADADDR			0x82000000
101 
102 /* We boot from the gfxRAM area of the OCRAM. */
103 #define CONFIG_SYS_TEXT_BASE		0x3f408000
104 #define CONFIG_BOARD_SIZE_LIMIT		524288
105 
106 /* if no target-specific extra environment settings were defined by the
107    target, define an empty one */
108 #ifndef PCM052_EXTRA_ENV_SETTINGS
109 #define PCM052_EXTRA_ENV_SETTINGS
110 #endif
111 
112 /* if no target-specific boot command was defined by the target,
113    define an empty one */
114 #ifndef PCM052_BOOTCOMMAND
115 #define PCM052_BOOTCOMMAND
116 #endif
117 
118 /* if no target-specific extra environment settings were defined by the
119    target, define an empty one */
120 #ifndef PCM052_NET_INIT
121 #define PCM052_NET_INIT
122 #endif
123 
124 /* boot command, including the target-defined one if any */
125 #define CONFIG_BOOTCOMMAND	PCM052_BOOTCOMMAND "run bootcmd_nand"
126 
127 /* Extra env settings (including the target-defined ones if any) */
128 #define CONFIG_EXTRA_ENV_SETTINGS \
129 	PCM052_EXTRA_ENV_SETTINGS \
130 	"autoload=no\0" \
131 	"fdt_high=0xffffffff\0" \
132 	"initrd_high=0xffffffff\0" \
133 	"blimg_file=u-boot.vyb\0" \
134 	"blimg_addr=0x81000000\0" \
135 	"kernel_file=zImage\0" \
136 	"kernel_addr=0x82000000\0" \
137 	"fdt_file=zImage.dtb\0" \
138 	"fdt_addr=0x81000000\0" \
139 	"ram_file=uRamdisk\0" \
140 	"ram_addr=0x83000000\0" \
141 	"filesys=rootfs.ubifs\0" \
142 	"sys_addr=0x81000000\0" \
143 	"tftploc=/path/to/tftp/directory/\0" \
144 	"nfs_root=/path/to/nfs/root\0" \
145 	"tftptimeout=1000\0" \
146 	"tftptimeoutcountmax=1000000\0" \
147 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
148 	"bootargs_base=setenv bootargs rw " \
149 		" mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \
150 		"console=ttyLP1,115200n8\0" \
151 	"bootargs_sd=setenv bootargs ${bootargs} " \
152 		"root=/dev/mmcblk0p2 rootwait\0" \
153 	"bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
154 		"nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
155 	"bootargs_nand=setenv bootargs ${bootargs} " \
156 		"ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \
157 	"bootargs_ram=setenv bootargs ${bootargs} " \
158 		"root=/dev/ram rw initrd=${ram_addr}\0" \
159 	"bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
160 	"bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
161 		"fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
162 		"fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
163 		"bootz ${kernel_addr} - ${fdt_addr}\0" \
164 	"bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
165 		"tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
166 		"tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
167 		"bootz ${kernel_addr} - ${fdt_addr}\0" \
168 	"bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
169 		"nand read ${fdt_addr} dtb; " \
170 		"nand read ${kernel_addr} kernel; " \
171 		"bootz ${kernel_addr} - ${fdt_addr}\0" \
172 	"bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
173 		"nand read ${fdt_addr} dtb; " \
174 		"nand read ${kernel_addr} kernel; " \
175 		"nand read ${ram_addr} root; " \
176 		"bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
177 	"update_bootloader_from_tftp=" PCM052_NET_INIT \
178 		"if tftp ${blimg_addr} "\
179 		"${tftpdir}${blimg_file}; then " \
180 		"mtdparts default; " \
181 		"nand erase.part bootloader; " \
182 		"nand write ${blimg_addr} bootloader ${filesize}; fi\0" \
183 	"update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
184 		"${kernel_file}; " \
185 		"then mtdparts default; " \
186 		"nand erase.part kernel; " \
187 		"nand write ${kernel_addr} kernel ${filesize}; " \
188 		"if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
189 		"nand erase.part dtb; " \
190 		"nand write ${fdt_addr} dtb ${filesize}; fi\0" \
191 	"update_kernel_from_tftp=" PCM052_NET_INIT \
192 		"if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
193 		"then setenv fdtsize ${filesize}; " \
194 		"if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
195 		"mtdparts default; " \
196 		"nand erase.part dtb; " \
197 		"nand write ${fdt_addr} dtb ${fdtsize}; " \
198 		"nand erase.part kernel; " \
199 		"nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
200 	"update_rootfs_from_tftp=" PCM052_NET_INIT \
201 		"if tftp ${sys_addr} ${tftpdir}${filesys}; " \
202 		"then mtdparts default; " \
203 		"nand erase.part root; " \
204 		"ubi part root; " \
205 		"ubi create rootfs; " \
206 		"ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
207 	"update_ramdisk_from_tftp=" PCM052_NET_INIT \
208 		"if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
209 		"then mtdparts default; " \
210 		"nand erase.part root; " \
211 		"nand write ${ram_addr} root ${filesize}; fi\0"
212 
213 /* Miscellaneous configurable options */
214 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
215 #define CONFIG_AUTO_COMPLETE
216 #define CONFIG_CMDLINE_EDITING
217 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
218 #define CONFIG_SYS_PBSIZE		\
219 			(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
220 #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
221 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
222 
223 #define CONFIG_SYS_MEMTEST_START	0x80010000
224 #define CONFIG_SYS_MEMTEST_END		0x87C00000
225 
226 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
227 
228 /* Physical memory map */
229 #define CONFIG_NR_DRAM_BANKS		1
230 #define PHYS_SDRAM			(0x80000000)
231 #define PHYS_SDRAM_SIZE			(CONFIG_PCM052_DDR_SIZE * 1024 * 1024)
232 
233 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
234 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
235 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
236 
237 #define CONFIG_SYS_INIT_SP_OFFSET \
238 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
239 #define CONFIG_SYS_INIT_SP_ADDR \
240 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
241 
242 /* environment organization */
243 #ifdef CONFIG_ENV_IS_IN_MMC
244 #define CONFIG_ENV_SIZE			(8 * 1024)
245 
246 #define CONFIG_ENV_OFFSET		(12 * 64 * 1024)
247 #define CONFIG_SYS_MMC_ENV_DEV		0
248 #endif
249 
250 #ifdef CONFIG_ENV_IS_IN_NAND
251 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)
252 #define CONFIG_ENV_SIZE			(8 * 1024)
253 #define CONFIG_ENV_OFFSET		0xA0000
254 #define CONFIG_ENV_SIZE_REDUND		(8 * 1024)
255 #define CONFIG_ENV_OFFSET_REDUND	0xC0000
256 #endif
257 
258 #endif
259