1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the phytec PCM-052 SoM. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 14 #define CONFIG_VF610 15 16 #define CONFIG_DISPLAY_CPUINFO 17 #define CONFIG_DISPLAY_BOARDINFO 18 #define CONFIG_SYS_THUMB_BUILD 19 20 #define CONFIG_SKIP_LOWLEVEL_INIT 21 22 /* Enable passing of ATAGs */ 23 #define CONFIG_CMDLINE_TAG 24 25 /* Size of malloc() pool */ 26 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 27 28 #define CONFIG_BOARD_EARLY_INIT_F 29 30 /* Allow to overwrite serial and ethaddr */ 31 #define CONFIG_ENV_OVERWRITE 32 #define CONFIG_BAUDRATE 115200 33 34 /* NAND support */ 35 #define CONFIG_CMD_NAND 36 #define CONFIG_CMD_NAND_TRIMFFS 37 #define CONFIG_SYS_NAND_ONFI_DETECTION 38 39 #ifdef CONFIG_CMD_NAND 40 #define CONFIG_USE_ARCH_MEMCPY 41 #define CONFIG_SYS_MAX_NAND_DEVICE 1 42 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 43 44 #define CONFIG_JFFS2_NAND 45 46 /* UBI */ 47 #define CONFIG_CMD_UBIFS 48 #define CONFIG_RBTREE 49 #define CONFIG_LZO 50 51 /* Dynamic MTD partition support */ 52 #define CONFIG_CMD_MTDPARTS 53 #define CONFIG_MTD_PARTITIONS 54 #define CONFIG_MTD_DEVICE 55 56 #ifndef MTDIDS_DEFAULT 57 #define MTDIDS_DEFAULT "nand0=NAND" 58 #endif 59 60 #ifndef MTDPARTS_DEFAULT 61 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\ 62 ",128k(env1)"\ 63 ",128k(env2)"\ 64 ",128k(dtb)"\ 65 ",6144k(kernel)"\ 66 ",-(root)" 67 #endif 68 69 #endif 70 71 #define CONFIG_MMC 72 #define CONFIG_FSL_ESDHC 73 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 74 #define CONFIG_SYS_FSL_ESDHC_NUM 1 75 76 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ 77 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135 78 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111 79 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 80 81 #define CONFIG_GENERIC_MMC 82 #define CONFIG_DOS_PARTITION 83 84 #define CONFIG_FEC_MXC 85 #define CONFIG_MII 86 #define IMX_FEC_BASE ENET_BASE_ADDR 87 #define CONFIG_FEC_XCV_TYPE RMII 88 #define CONFIG_FEC_MXC_PHYADDR 0 89 #define CONFIG_PHYLIB 90 #define CONFIG_PHY_MICREL 91 92 /* QSPI Configs*/ 93 94 #ifdef CONFIG_FSL_QSPI 95 #define FSL_QSPI_FLASH_SIZE (1 << 24) 96 #define FSL_QSPI_FLASH_NUM 2 97 #define CONFIG_SYS_FSL_QSPI_LE 98 #endif 99 100 /* I2C Configs */ 101 #define CONFIG_SYS_I2C 102 #define CONFIG_SYS_I2C_MXC_I2C3 103 #define CONFIG_SYS_I2C_MXC 104 105 /* RTC (actually an RV-4162 but M41T62-compatible) */ 106 #define CONFIG_CMD_DATE 107 #define CONFIG_RTC_M41T62 108 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 109 #define CONFIG_SYS_RTC_BUS_NUM 2 110 111 /* EEPROM (24FC256) */ 112 #define CONFIG_CMD_EEPROM 113 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 114 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 115 #define CONFIG_SYS_I2C_EEPROM_BUS 2 116 117 118 #define CONFIG_LOADADDR 0x82000000 119 120 /* We boot from the gfxRAM area of the OCRAM. */ 121 #define CONFIG_SYS_TEXT_BASE 0x3f408000 122 #define CONFIG_BOARD_SIZE_LIMIT 524288 123 124 /* if no target-specific extra environment settings were defined by the 125 target, define an empty one */ 126 #ifndef PCM052_EXTRA_ENV_SETTINGS 127 #define PCM052_EXTRA_ENV_SETTINGS 128 #endif 129 130 /* if no target-specific boot command was defined by the target, 131 define an empty one */ 132 #ifndef PCM052_BOOTCOMMAND 133 #define PCM052_BOOTCOMMAND 134 #endif 135 136 /* if no target-specific extra environment settings were defined by the 137 target, define an empty one */ 138 #ifndef PCM052_NET_INIT 139 #define PCM052_NET_INIT 140 #endif 141 142 /* boot command, including the target-defined one if any */ 143 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand" 144 145 /* Extra env settings (including the target-defined ones if any) */ 146 #define CONFIG_EXTRA_ENV_SETTINGS \ 147 PCM052_EXTRA_ENV_SETTINGS \ 148 "autoload=no\0" \ 149 "fdt_high=0xffffffff\0" \ 150 "initrd_high=0xffffffff\0" \ 151 "blimg_file=u-boot.vyb\0" \ 152 "blimg_addr=0x81000000\0" \ 153 "kernel_file=zImage\0" \ 154 "kernel_addr=0x82000000\0" \ 155 "fdt_file=zImage.dtb\0" \ 156 "fdt_addr=0x81000000\0" \ 157 "ram_file=uRamdisk\0" \ 158 "ram_addr=0x83000000\0" \ 159 "filesys=rootfs.ubifs\0" \ 160 "sys_addr=0x81000000\0" \ 161 "tftploc=/path/to/tftp/directory/\0" \ 162 "nfs_root=/path/to/nfs/root\0" \ 163 "tftptimeout=1000\0" \ 164 "tftptimeoutcountmax=1000000\0" \ 165 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 166 "bootargs_base=setenv bootargs rw " \ 167 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ 168 "console=ttyLP1,115200n8\0" \ 169 "bootargs_sd=setenv bootargs ${bootargs} " \ 170 "root=/dev/mmcblk0p2 rootwait\0" \ 171 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \ 172 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \ 173 "bootargs_nand=setenv bootargs ${bootargs} " \ 174 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \ 175 "bootargs_ram=setenv bootargs ${bootargs} " \ 176 "root=/dev/ram rw initrd=${ram_addr}\0" \ 177 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 178 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ 179 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \ 180 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \ 181 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 182 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \ 183 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \ 184 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \ 185 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 186 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \ 187 "nand read ${fdt_addr} dtb; " \ 188 "nand read ${kernel_addr} kernel; " \ 189 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 190 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ 191 "nand read ${fdt_addr} dtb; " \ 192 "nand read ${kernel_addr} kernel; " \ 193 "nand read ${ram_addr} root; " \ 194 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ 195 "update_bootloader_from_tftp=" PCM052_NET_INIT \ 196 "if tftp ${blimg_addr} "\ 197 "${tftpdir}${blimg_file}; then " \ 198 "mtdparts default; " \ 199 "nand erase.part bootloader; " \ 200 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ 201 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \ 202 "${kernel_file}; " \ 203 "then mtdparts default; " \ 204 "nand erase.part kernel; " \ 205 "nand write ${kernel_addr} kernel ${filesize}; " \ 206 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \ 207 "nand erase.part dtb; " \ 208 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \ 209 "update_kernel_from_tftp=" PCM052_NET_INIT \ 210 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \ 211 "then setenv fdtsize ${filesize}; " \ 212 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \ 213 "mtdparts default; " \ 214 "nand erase.part dtb; " \ 215 "nand write ${fdt_addr} dtb ${fdtsize}; " \ 216 "nand erase.part kernel; " \ 217 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \ 218 "update_rootfs_from_tftp=" PCM052_NET_INIT \ 219 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \ 220 "then mtdparts default; " \ 221 "nand erase.part root; " \ 222 "ubi part root; " \ 223 "ubi create rootfs; " \ 224 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \ 225 "update_ramdisk_from_tftp=" PCM052_NET_INIT \ 226 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ 227 "then mtdparts default; " \ 228 "nand erase.part root; " \ 229 "nand write ${ram_addr} root ${filesize}; fi\0" 230 231 /* Miscellaneous configurable options */ 232 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 233 #define CONFIG_AUTO_COMPLETE 234 #define CONFIG_CMDLINE_EDITING 235 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 236 #define CONFIG_SYS_PBSIZE \ 237 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 238 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 239 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 240 241 #define CONFIG_SYS_MEMTEST_START 0x80010000 242 #define CONFIG_SYS_MEMTEST_END 0x87C00000 243 244 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 245 246 /* 247 * Stack sizes 248 * The stack sizes are set up in start.S using the settings below 249 */ 250 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 251 252 /* Physical memory map */ 253 #define CONFIG_NR_DRAM_BANKS 1 254 #define PHYS_SDRAM (0x80000000) 255 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) 256 257 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 258 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 259 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 260 261 #define CONFIG_SYS_INIT_SP_OFFSET \ 262 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 263 #define CONFIG_SYS_INIT_SP_ADDR \ 264 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 265 266 /* FLASH and environment organization */ 267 #define CONFIG_SYS_NO_FLASH 268 269 #ifdef CONFIG_ENV_IS_IN_MMC 270 #define CONFIG_ENV_SIZE (8 * 1024) 271 272 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 273 #define CONFIG_SYS_MMC_ENV_DEV 0 274 #endif 275 276 #ifdef CONFIG_ENV_IS_IN_NAND 277 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 278 #define CONFIG_ENV_SIZE (8 * 1024) 279 #define CONFIG_ENV_OFFSET 0xA0000 280 #define CONFIG_ENV_SIZE_REDUND (8 * 1024) 281 #define CONFIG_ENV_OFFSET_REDUND 0xC0000 282 #endif 283 284 #endif 285