1 /* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the phytec PCM-052 SoM. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 #include <asm/arch/imx-regs.h> 13 14 #define CONFIG_VF610 15 16 #define CONFIG_SYS_THUMB_BUILD 17 18 #define CONFIG_SKIP_LOWLEVEL_INIT 19 20 /* Enable passing of ATAGs */ 21 #define CONFIG_CMDLINE_TAG 22 23 /* Size of malloc() pool */ 24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 25 26 /* Allow to overwrite serial and ethaddr */ 27 #define CONFIG_ENV_OVERWRITE 28 #define CONFIG_BAUDRATE 115200 29 30 /* NAND support */ 31 #define CONFIG_CMD_NAND 32 #define CONFIG_CMD_NAND_TRIMFFS 33 #define CONFIG_SYS_NAND_ONFI_DETECTION 34 35 #ifdef CONFIG_CMD_NAND 36 #define CONFIG_SYS_MAX_NAND_DEVICE 1 37 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR 38 39 #define CONFIG_JFFS2_NAND 40 41 /* UBI */ 42 #define CONFIG_CMD_UBIFS 43 #define CONFIG_RBTREE 44 #define CONFIG_LZO 45 46 /* Dynamic MTD partition support */ 47 #define CONFIG_CMD_MTDPARTS 48 #define CONFIG_MTD_PARTITIONS 49 #define CONFIG_MTD_DEVICE 50 51 #ifndef MTDIDS_DEFAULT 52 #define MTDIDS_DEFAULT "nand0=NAND" 53 #endif 54 55 #ifndef MTDPARTS_DEFAULT 56 #define MTDPARTS_DEFAULT "mtdparts=NAND:640k(bootloader)"\ 57 ",128k(env1)"\ 58 ",128k(env2)"\ 59 ",128k(dtb)"\ 60 ",6144k(kernel)"\ 61 ",-(root)" 62 #endif 63 64 #endif 65 66 #define CONFIG_FSL_ESDHC 67 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 68 #define CONFIG_SYS_FSL_ESDHC_NUM 1 69 70 /*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/ 71 72 #define CONFIG_GENERIC_MMC 73 74 #define CONFIG_FEC_MXC 75 #define CONFIG_MII 76 #define IMX_FEC_BASE ENET_BASE_ADDR 77 #define CONFIG_FEC_XCV_TYPE RMII 78 #define CONFIG_FEC_MXC_PHYADDR 0 79 #define CONFIG_PHYLIB 80 #define CONFIG_PHY_MICREL 81 82 /* QSPI Configs*/ 83 84 #ifdef CONFIG_FSL_QSPI 85 #define FSL_QSPI_FLASH_SIZE (1 << 24) 86 #define FSL_QSPI_FLASH_NUM 2 87 #define CONFIG_SYS_FSL_QSPI_LE 88 #endif 89 90 /* I2C Configs */ 91 #define CONFIG_SYS_I2C 92 #define CONFIG_SYS_I2C_MXC_I2C3 93 #define CONFIG_SYS_I2C_MXC 94 95 /* RTC (actually an RV-4162 but M41T62-compatible) */ 96 #define CONFIG_CMD_DATE 97 #define CONFIG_RTC_M41T62 98 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 99 #define CONFIG_SYS_RTC_BUS_NUM 2 100 101 /* EEPROM (24FC256) */ 102 #define CONFIG_CMD_EEPROM 103 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 104 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 105 #define CONFIG_SYS_I2C_EEPROM_BUS 2 106 107 108 #define CONFIG_LOADADDR 0x82000000 109 110 /* We boot from the gfxRAM area of the OCRAM. */ 111 #define CONFIG_SYS_TEXT_BASE 0x3f408000 112 #define CONFIG_BOARD_SIZE_LIMIT 524288 113 114 /* if no target-specific extra environment settings were defined by the 115 target, define an empty one */ 116 #ifndef PCM052_EXTRA_ENV_SETTINGS 117 #define PCM052_EXTRA_ENV_SETTINGS 118 #endif 119 120 /* if no target-specific boot command was defined by the target, 121 define an empty one */ 122 #ifndef PCM052_BOOTCOMMAND 123 #define PCM052_BOOTCOMMAND 124 #endif 125 126 /* if no target-specific extra environment settings were defined by the 127 target, define an empty one */ 128 #ifndef PCM052_NET_INIT 129 #define PCM052_NET_INIT 130 #endif 131 132 /* boot command, including the target-defined one if any */ 133 #define CONFIG_BOOTCOMMAND PCM052_BOOTCOMMAND "run bootcmd_nand" 134 135 /* Extra env settings (including the target-defined ones if any) */ 136 #define CONFIG_EXTRA_ENV_SETTINGS \ 137 PCM052_EXTRA_ENV_SETTINGS \ 138 "autoload=no\0" \ 139 "fdt_high=0xffffffff\0" \ 140 "initrd_high=0xffffffff\0" \ 141 "blimg_file=u-boot.vyb\0" \ 142 "blimg_addr=0x81000000\0" \ 143 "kernel_file=zImage\0" \ 144 "kernel_addr=0x82000000\0" \ 145 "fdt_file=zImage.dtb\0" \ 146 "fdt_addr=0x81000000\0" \ 147 "ram_file=uRamdisk\0" \ 148 "ram_addr=0x83000000\0" \ 149 "filesys=rootfs.ubifs\0" \ 150 "sys_addr=0x81000000\0" \ 151 "tftploc=/path/to/tftp/directory/\0" \ 152 "nfs_root=/path/to/nfs/root\0" \ 153 "tftptimeout=1000\0" \ 154 "tftptimeoutcountmax=1000000\0" \ 155 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 156 "bootargs_base=setenv bootargs rw " \ 157 " mem=" __stringify(CONFIG_PCM052_DDR_SIZE) "M " \ 158 "console=ttyLP1,115200n8\0" \ 159 "bootargs_sd=setenv bootargs ${bootargs} " \ 160 "root=/dev/mmcblk0p2 rootwait\0" \ 161 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \ 162 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \ 163 "bootargs_nand=setenv bootargs ${bootargs} " \ 164 "ubi.mtd=5 rootfstype=ubifs root=ubi0:rootfs\0" \ 165 "bootargs_ram=setenv bootargs ${bootargs} " \ 166 "root=/dev/ram rw initrd=${ram_addr}\0" \ 167 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 168 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \ 169 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \ 170 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \ 171 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 172 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \ 173 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \ 174 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \ 175 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 176 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \ 177 "nand read ${fdt_addr} dtb; " \ 178 "nand read ${kernel_addr} kernel; " \ 179 "bootz ${kernel_addr} - ${fdt_addr}\0" \ 180 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \ 181 "nand read ${fdt_addr} dtb; " \ 182 "nand read ${kernel_addr} kernel; " \ 183 "nand read ${ram_addr} root; " \ 184 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \ 185 "update_bootloader_from_tftp=" PCM052_NET_INIT \ 186 "if tftp ${blimg_addr} "\ 187 "${tftpdir}${blimg_file}; then " \ 188 "mtdparts default; " \ 189 "nand erase.part bootloader; " \ 190 "nand write ${blimg_addr} bootloader ${filesize}; fi\0" \ 191 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \ 192 "${kernel_file}; " \ 193 "then mtdparts default; " \ 194 "nand erase.part kernel; " \ 195 "nand write ${kernel_addr} kernel ${filesize}; " \ 196 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \ 197 "nand erase.part dtb; " \ 198 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \ 199 "update_kernel_from_tftp=" PCM052_NET_INIT \ 200 "if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \ 201 "then setenv fdtsize ${filesize}; " \ 202 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \ 203 "mtdparts default; " \ 204 "nand erase.part dtb; " \ 205 "nand write ${fdt_addr} dtb ${fdtsize}; " \ 206 "nand erase.part kernel; " \ 207 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \ 208 "update_rootfs_from_tftp=" PCM052_NET_INIT \ 209 "if tftp ${sys_addr} ${tftpdir}${filesys}; " \ 210 "then mtdparts default; " \ 211 "nand erase.part root; " \ 212 "ubi part root; " \ 213 "ubi create rootfs; " \ 214 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \ 215 "update_ramdisk_from_tftp=" PCM052_NET_INIT \ 216 "if tftp ${ram_addr} ${tftpdir}${ram_file}; " \ 217 "then mtdparts default; " \ 218 "nand erase.part root; " \ 219 "nand write ${ram_addr} root ${filesize}; fi\0" 220 221 /* Miscellaneous configurable options */ 222 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 223 #define CONFIG_AUTO_COMPLETE 224 #define CONFIG_CMDLINE_EDITING 225 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 226 #define CONFIG_SYS_PBSIZE \ 227 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 228 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 229 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 230 231 #define CONFIG_SYS_MEMTEST_START 0x80010000 232 #define CONFIG_SYS_MEMTEST_END 0x87C00000 233 234 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 235 236 /* 237 * Stack sizes 238 * The stack sizes are set up in start.S using the settings below 239 */ 240 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ 241 242 /* Physical memory map */ 243 #define CONFIG_NR_DRAM_BANKS 1 244 #define PHYS_SDRAM (0x80000000) 245 #define PHYS_SDRAM_SIZE (CONFIG_PCM052_DDR_SIZE * 1024 * 1024) 246 247 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 248 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 249 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 250 251 #define CONFIG_SYS_INIT_SP_OFFSET \ 252 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 253 #define CONFIG_SYS_INIT_SP_ADDR \ 254 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 255 256 /* FLASH and environment organization */ 257 #define CONFIG_SYS_NO_FLASH 258 259 #ifdef CONFIG_ENV_IS_IN_MMC 260 #define CONFIG_ENV_SIZE (8 * 1024) 261 262 #define CONFIG_ENV_OFFSET (12 * 64 * 1024) 263 #define CONFIG_SYS_MMC_ENV_DEV 0 264 #endif 265 266 #ifdef CONFIG_ENV_IS_IN_NAND 267 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 268 #define CONFIG_ENV_SIZE (8 * 1024) 269 #define CONFIG_ENV_OFFSET 0xA0000 270 #define CONFIG_ENV_SIZE_REDUND (8 * 1024) 271 #define CONFIG_ENV_OFFSET_REDUND 0xC0000 272 #endif 273 274 #endif 275